PIC16F15213 datasheet(113/439 Pages) MICROCHIP

113 / 439 page

Example 15-3. Erasing One Row of Program Flash Memory

NVMCON1bits.NVMREGS = 0;

// Point to PFM

NVMADR = PFM_ADD;

// 14-bit PFM address

NVMCON1bits.FREE = 1;

// Specify an erase operation

NVMCON1bits.WREN = 1;

// Enable write/erase cycle

INTCONbits.GIE = 0;

// Disable interrupts during unlock sequence

//The next three steps are the required unlock sequence

NVMCON2 = 0x55;

// First unlock code

NVMCON2 = 0xAA;

// Second unlock code

NVMCON1bits.WR = 1;

// Initiate write/erase cycle

INTCONbits.GIE = 1;

// Enable interrupts

NVMCON1bits.WREN = 1;

// Disable writes

15.1.2.4 NVMREG Write to Program Memory

Program memory is programmed using the following steps:

Load the address of the row to be programmed into NVMADRH:NVMADRL.

Load each write latch with data via the NMVDATH:NVMDATL registers.

Initiate a programming operation.

Repeat steps 1 through 3 until all data is written.

Before writing to program memory, the word(s) to be written must be erased or previously unwritten. Program

memory can only be erased one row at a time. No automatic erase occurs upon the initiation of the write.

Program memory can be written one or more words at a time. The maximum number of words written at one time is

equal to the number of write latches. See Figure 15-4 for more details.

The write latches are aligned to the Flash row address boundary defined by the upper ten bits of

NVMADRH:NVMADRL, (NVMADRH[6:0]:NVMADRL[7:5]) with the lower five bits of NVMADRL, (NVMADRL[4:0])

determining the write latch being loaded. Write operations do not cross these boundaries. At the completion of a

program memory write operation, the data in the write latches is reset to contain 0x3FFF.

The following steps must be completed to load the write latches and program a row of program memory. These steps

are divided into two parts. First, each write latch is loaded with data from the NVMDATH:NVMDATL using the unlock

sequence with LWLO = 1. When the last word to be loaded into the write latch is ready, the LWLO bit is cleared and

the unlock sequence executed. This initiates the programming operation, writing all the latches into Flash program

memory.

Important: The special unlock sequence is required to load a write latch with data or initiate a Flash

programming operation. If the unlock sequence is interrupted, writing to the latches or program memory

will not be initiated.

Set the WREN bit.

Clear the NVMREGS bit.

Set the LWLO bit. When the LWLO bit is set (LWLO = 1), the write sequence will only load the write latches

and will not initiate the write to Program Flash Memory.

Load the NVMADRH:NVMADRL register pair with the address of the location to be written.

Load the NVMDATH:NVMDATL register pair with the program memory data to be written.

Execute the unlock sequence. The write latch is now loaded.

Increment the NVMADRH:NVMADRL register pair to point to the next location.

Repeat steps 5 through 7 until all except the last write latch has been loaded.

Clear the LWLO bit. When the LWLO bit is clear (LWLO = 0), the write sequence will initiate the write to

Program Flash Memory.

10. Load the NVMDATH:NVMDATL register pair with the program memory data to be written.

PIC16F15213/14/23/24/43/44

NVM - Nonvolatile Memory Control

and its subsidiaries

Data Sheet

DS40002195E-page 113

PIC16F15213 Datasheet(PDF) 113 Page - Microchip Technology

PIC16F15213 Datasheet(HTML) 113 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL