74HC160DB datasheet(9/9 Pages) PHILIPS

9 / 9 page

December 1990

Philips Semiconductors

Product speciﬁcation

Presettable synchronous BCD decade

counter; asynchronous reset

74HC/HCT160

AC CHARACTERISTICS FOR 74HCT

GND = 0 V; tr =tf = 6 ns; CL = 50 pF

PACKAGE OUTLINES

See

“74HC/HCT/HCU/HCMOS Logic Package Outlines”.

SYMBOL PARAMETER

Tamb (°C)

UNIT

TEST CONDITIONS

74HCT

VCC

(V)

WAVEFORMS

+25

−40 to +85

−40 to +125

min. typ.

max.

min.

max.

min.

max.

tPHL/ tPLH propagation delay

CP to Qn

4.5

Fig. 8

tPHL

propagation delay

CP to TC

4.5

Fig. 8

tPLH

propagation delay

CP to TC

4.5

Fig. 8

tPHL

propagation delay

MR to Qn

4.5

Fig. 9

tPHL

propagation delay

MR to TC

4.5

Fig. 9

tPHL

propagation delay

CET to TC

4.5

Fig. 10

tPLH

propagation delay

CET to TC

4.5

Fig. 10

tTHL/ tTLH

output transition time

4.5

Figs 8 and 10

clock pulse width

HIGH or LOW

4.5

Fig. 8

master reset pulse width

LOW

4.5

Fig. 9

trem

removal time

MR to CP

4.5

Fig. 9

tsu

set-up time

Dn to CP

4.5

Fig. 11

tsu

set-up time

PE to CP

4.5

Fig. 11

tsu

set-up time

CEP, CET to CP

4.5

Fig. 12

hold time

Dn to CP

−8

4.5

Figs 11 and 12

hold time

PE to CP

−13

4.5

Figs 11 and 12

hold time

CEP, CET to CP

−21

4.5

Figs 11 and 12

fmax

maximum clock pulse

frequency

MHz

4.5

Fig. 8

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