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L99DZ100GPTR Datasheet(PDF) 73 Page - STMicroelectronics |
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L99DZ100GPTR Datasheet(HTML) 73 Page - STMicroelectronics |
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73 / 197 page ![]() DS11546 Rev 5 73/197 L99DZ100G, L99DZ100GP Application information 196 4.3.2 Flash modes To program the system microcontroller via LIN or HS CAN bus signals, the devices can be operated in LIN Flash mode or CAN Flash mode. The watchdog is disabled in these modes. The Flash modes are entered by applying an external voltage at the respective pin: VTxDL ≥ VFlashH (CAN Flash mode) VTxDC ≥ VFlashH (LIN Flash mode) In CAN Flash mode the CAN transceiver is set in TRX bias mode (CAN_GO_TO_TRX_RDY = 1) and TRX Normal mode automatically During CAN Flash mode, the watchdog can be deactivated by setting CR34: WDEN = 0. Write access to this bit is only possible during CAN Flash mode in order to prevent accidental deactivation of the watchdog. After setting WDEN (CR 34) the CAN Flash mode can be left (VTxDL < VFlashL) and the Watchdog will remain deactivated (see Figure 21) Figure 21. Sequence to disable/enable the watchdog in CAN Flash mode In LIN Flash mode the maximum bitrate is increased to 100 kbit/s automatically (LIN_HS_EN = 1). A transition from Flash modes to V1_standby or Vbat_standby mode is not possible. At exit from Flash modes (VTxDL < VFlashL, VTxDC < VFlashL) no NReset pulse is generated. The watchdog starts with a Long Open Window (tLW). Note: Setting both TxDL and TxDC to high voltage levels (> VFlashH) is not allowed. Communication at the respective TxD pin is not possible. 4.3.3 SW-debug mode To allow software debugging, the watchdog can be deactivated by applying an external voltage to the DEBUG input pin (Vdebug > VdiH). In Debug mode, all device functionality and Operating modes are available. The watchdog is deactivated. At Exit from Debug mode (Vdebug < VdiL) the watchdog starts with a Long Open Window. Note: The device includes a test mode. This mode is activated by a dedicated sequence which includes a high voltage at the Debug Pin. The Debug Pin must be kept at nominal voltage levels in order to avoid accidental activation of the test mode. |
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