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74HC191DB Datasheet(PDF) 13 Page - NXP Semiconductors |
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74HC191DB Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 14 page ![]() December 1990 13 Philips Semiconductors Product specification Presettable synchronous 4-bit binary up/down counter 74HC/HCT191 Fig.13 Waveforms showing the input (PL) to output (Qn) propagation delays. (1) HC : VM = 50%; VI = GND to VCC. HCT : VM = 1.3 V; VI = GND to 3 V. Fig.14 Waveforms showing the up/down count input (U/D) to terminal count and ripple clock output (TC, RC) propagation delays. (1) HC : VM = 50%; VI = GND to VCC. HCT : VM = 1.3 V; VI = GND to 3 V. Fig.15 Waveforms showing the parallel load input (PL) pulse width, removal time to clock (CP) and the output (Qn) transition times. (1) HC : VM = 50%; VI = GND to VCC. HCT : VM = 1.3 V; VI = GND to 3 V. |
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