December 1990

2

Philips Semiconductors

Product specification

3-to-8 line decoder/demultiplexer

74HC/HCT238

FEATURES

• Demultiplexing capability

• Multiple input enable for easy expansion

• Ideal for memory chip select decoding

• Active HIGH mutually exclusive outputs

• Output capability: standard

GENERAL DESCRIPTION

The 74HC/HCT238 are high-speed Si-gate CMOS devices

and are pin compatible with low power Schottky TTL

(LSTTL). They are specified in compliance with JEDEC

standard no. 7A.

The 74HC/HCT238 decoders accept three binary

provide 8 mutually exclusive active HIGH outputs

The “238” features three enable inputs: two active LOW

This multiple enable function allows easy parallel

expansion of the “238” to a 1-of-32 (5 lines to 32 lines)

decoder with just four “238” ICs and one inverter.

The “238” can be used as an eight output demultiplexer by

using one of the active LOW enable inputs as the data

input and the remaining enable inputs as strobes. Unused

enable inputs must be permanently tied to their

appropriate active HIGH or LOW state.

The “238” is identical to the “138” but has non-inverting

outputs.

QUICK REFERENCE DATA

Notes

ORDERING INFORMATION

See

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

HC

HCT

propagation delay

14

18

ns

16

20

ns

17

21

ns

input capacitance

3.5

3.5

pF

power dissipation capacitance per package

notes 1 and 2

72

76

pF