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LTC3646/LTC3646-1

36461fc

For more information www.linear.com/LTC3646

Thermal Considerations

The LTC3646 requires the exposed package backplane

metal (PGND) to be well soldered to the PC board to pro-

vide good thermal contact. This gives the DFN and MSOP

packages exceptional thermal properties, compared to

other packages of similar size, making it difficult in normal

operation to exceed the maximum junction temperature

of the part. In many applications, the LTC3646 does not

generate much heat due to its high efficiency. However,

in applications in which the LTC3646 is running at a high

ambient temperature, high input voltage, high switching

frequency, and maximum output current, the heat dissi-

pated may cause the part to exceed the maximum allowed

junction temperature. If the junction temperature reaches

approximately 175°C, both power switches will be turned

off until temperature decreases approximately 10°C.

Thermal analysis should always be performed by the user

to ensure the LTC3646 does not exceed the maximum

junction temperature.

The temperature rise is given by:

tRISE = PD θJA

where PD is the power dissipated by the regulator and

θJA is the thermal resistance from the junction of the

die to the ambient. Consider the example in which an

LTC3646IDE-1 is operating with IOUT = 1.0A, SVIN = 12V,

f = 3MHz, VOUT = 1.8V, and a board temperature of 85°C.

From the Typical Performance Characteristics section, the

RDS(ON) of the top switch is found to be nominally 200mΩ

while that of the bottom switch is nominally 120mΩ

yielding an equivalent power MOSFET resistance RSW of:

RDS(ON)TOP •1.8

RDS(ON)BOT •10.2

= 132mΩ

From the previous section, IGATECHG + IQ is ~15mA when

f = 3MHz. Therefore, the total power dissipation due to

resistive losses and LDO losses is:

PD = IOUT2 • RSW + SVIN • (IGATECHG + IQ)

PD = (1.0)2 • (0.132) + 12V • 15mA = 312mW

and the transition loss is:

PT = 1.0 • 122 • 10–10 • 3.0 • 106 = 43mW

APPLICATIONS INFORMATION

TheDFN4mm×3mmpackagejunction-to-ambientthermal

resistance, θJA, is approximately 43°C/W. Therefore, the

junction temperature of the regulator operating in a 85°C

ambient temperature is approximately:

TJ = (0.312 + 0.043) • 43 + 85 = 100°C

which is below the specified maximum junction tempera-

ture of 125°C.

High input voltage, high frequency applications may cause

the internal LDO to generate significant heat. The INTVCC

current, which is dominated by the gate charge current,

may be supplied by either the SVIN LDO or through the

EXTVCC pin. When the voltage on the EXTVCC pin is less

than4.5V,theVINLDOisenabled.Powerdissipationforthe

IC in this case is highest and is equal to SVIN • IINTVCC. The

gate charge current is dependent on operating frequency

as discussed in the Efficiency Considerations section. For

example, the LTC3646 INTVCC current is approximately

15mA at 3MHz operation. If VIN is at the 40V maximum,

the loss in the on-chip LDO is:

40V • 0.015A = 0.60W

In these situations it will be advantageous to bias the

part through the EXTVCC pin if a suitable voltage source

is available. When the voltage applied to EXTVCC rises

above 4.5V (maximum 6.0V), the SVIN LDO is turned off

and an internal switch between the EXTVCC and INTVCC

pins is closed. This voltage is unregulated and so in this

situation, INTVCC = EXTVCC.

Using EXTVCC allows the control power to be derived from

the output if the output voltage is between 4.5V and 6.0V

during normal operation and from the SVIN LDO when the

output is out of regulation (e.g., start-up, short-circuit).

Significant efficiency and thermal gains can be realized by

powering INTVCC from the output, since the power needed

for the driver and control currents will be supplied from

the buck converter instead of the internal linear regulator.

For 4.5V to 6V regulator outputs, this means connecting

the EXTVCC pin directly to VOUT. Tying the EXTVCC pin to a

5.5V supply reduces the dissipated power in the previous

example from 0.60W to approximately:

5.5V • 0.015A = 82.5mW

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