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LT8620 Datasheet(PDF) 9 Page - Linear Technology |
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LT8620 Datasheet(HTML) 9 Page - Linear Technology |
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9 / 28 page ![]() LTC3646/LTC3646-1 9 36461fc For more information www.linear.com/LTC3646 OPERATION TheLTC3646andLTC3646-1arecurrentmode,monolithic, synchronous, step-down regulators capable of 40V input operation,andextremelyhighstepdownratioswhilemain- taining constant frequency. (Both will be referred to as the LTC3646 except as specifically noted.) Part operation is enabled by raising the voltage of the RUN pin above 1.21V. Main Control Loop In normal operation a switching cycle is initiated by a signal from the inductor valley current comparator (ICMP in the Block Diagram). The top power MOSFET is turned on, and a timer is simultaneously started in the on-time controller. The on-time controller computes the correct on time (subject to tON(MIN)) based on the desired switching frequencyfO,andstep-downratioVON/VIN,accordingtothe formula shown in the Block Diagram. In a typical applica- tion,theVONpinshouldbeconnectedtotheoutputvoltage, VOUT. When the timer expires, the top power MOSFET is turned off and the bottom power MOSFET is turned on until the current comparator (ICMP) trips, restarting the timer and initiating the next cycle. The inductor current is monitored by sensing the voltage drop across the SW and PGND nodes of the bottom power MOSFET. The volt- age at the ITH node sets the ICMP comparator threshold corresponding to the inductor valley current. The error amplifier (EA) adjusts the ITH voltage by comparing an internal 0.6V reference voltage to the feedback signal, VFB, derived from the output voltage. If, for example, the load current increases, the output voltage will decrease relative to the 0.6V reference. The ITH voltage will rise until the average inductor current increases to match the load current. At low load currents, the inductor current can drop to zero or become negative. If the LTC3646 is configured for Burst Mode operation, this inductor current condition is detected by the current reversal comparator (IREV) which then shuts off the bottom power MOSFET and places the part into a low quiescent current sleep state, resulting in discontinuous operation and increased efficiency at low load currents. Both power MOSFETs will remain off with the part in sleep and the output capacitor supplying the loadcurrentuntiltheITHvoltagerisessufficientlytoinitiate anothercycle.Discontinuousoperationisdisabledbytying the MODE/SYNC pin to ground, placing the LTC3646 into forced continuous mode. During forced continuous mode operation, synchronous operation occurs regardless of the output load current, and the inductor current trough levels are allowed to become negative. The operating frequency is determined by the value of the RRT resistor, which programs the current for the internal oscillator.Aninternalphase-lockedloopadjuststheswitch- ing regulator on-time so that the switching frequency matches the programmed frequency, subject to tON and tOFFtimeconstraintsshownintheElectricalCharacteristics table. Alternatively, the RT pin can be connected to the INTVCC pin which causes the internal oscillator to run at the default frequency of 2.25MHz. A clock signal can be applied to the MODE/SYNC pin to synchronizetheswitchingfrequencytoanexternalsource. When operating in this configuration, connect a resistor to the RT pin with a value corresponding to the applied clock frequency. With an external clock supplied to the MODE/ SYNC pin, the part will operate in forced continuous mode. Power Good Status Output The PGOOD open-drain output will be pulled low if the regulator output exits the VPGOOD window around the regulation point. This condition is released once regula- tion within the specified window is achieved. To prevent unwanted PGOOD glitches during transients or dynamic VOUT changes, the LTC3646 PGOOD falling edge includes a filter time of approximately 70 clock cycles. |
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