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HCT652 Datasheet(PDF) 6 Page - NXP Semiconductors |
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HCT652 Datasheet(HTML) 6 Page - NXP Semiconductors |
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6 / 10 page  September 1993 6 Philips Semiconductors Product specification Octal bus transceiver/register; 3-state 74HC/HCT652 DC CHARACTERISTICS FOR 74HC For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: bus driver ICC category: MSI. AC CHARACTERISTICS FOR 74HC GND = 0 V; tr =tf = 6 ns; CL = 50 pF. SYMBOL PARAMETER Tamb (°C) UNIT TEST CONDITIONS 74HC VCC (V) WAVEFORMS +25 −40 to +85 −40 to +125 MIN. TYP. MAX. MIN. MAX. MIN. MAX. tPHL/tPLH propagation delay An, Bn to Bn, An − − − 44 16 13 135 27 23 − − − 170 34 29 − − − 205 41 35 ns 2.0 4.5 6.0 Fig.6 tPHL/tPLH propagation delay CPAB, CPBA to Bn, An − − − 61 22 18 190 38 32 − − − 240 48 41 − − − 285 57 48 ns 2.0 4.5 6.0 Fig.7 tPHL/tPLH propagation delay SAB, SBA to Bn, An − − − 63 23 18 195 39 33 − − − 245 49 42 − − − 295 59 50 ns 2.0 4.5 6.0 Fig.8 tPZH/tPZL 3-state output enable time OEAB, OEBA to An, Bn − − − 47 17 14 150 30 26 − − − 190 38 33 − − − 225 45 38 ns 2.0 4.5 6.0 Fig.9 tPHZ/tPLZ 3-state output disable time OEAB, OEBA to An, Bn − − − 41 15 12 150 30 26 − − − 190 38 33 − − − 225 45 38 ns 2.0 4.5 6.0 Fig.9 tTHL/tTLH output transition time − − − 14 5 4 60 12 10 − − − 75 15 13 − − − 90 18 15 ns 2.0 4.5 6.0 Figs 6, 8 tW clock pulse width HIGH or LOW CPAB or CPBA 80 16 14 17 6 5 − − − 100 20 17 − − − 120 24 20 − − − ns 2.0 4.5 6.0 Fig.7 tsu set-up time An, Bn to CPAB, CPBA 100 20 17 17 6 5 − − − 125 25 21 − − − 150 30 26 − − − ns 2.0 4.5 6.0 Fig.7 th hold time An, Bn to CPAB, CPBA 25 5 4 −8 −3 −2 − − − 30 6 5 − − − 35 7 6 − − − ns 2.0 4.5 6.0 Fig.7 fmax maximum clock pulse frequency 6.0 30 35 16 83 98 − − − 4.8 24 28 − − − 4.0 20 24 − − − MHz 2.0 4.5 6.0 Fig.7 |
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