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74HC4053DB Datasheet(PDF) 21 Page - NXP Semiconductors |
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74HC4053DB Datasheet(HTML) 21 Page - NXP Semiconductors |
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21 / 33 page ![]() 74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 04 — 9 May 2006 21 of 33 Philips Semiconductors 74HC4053; 74HCT4053 Triple 2-channel analog multiplexer/demultiplexer [1] VI values: a) For 74HC4053: VI =VCC. b) For 74HCT4053: VI =3V. Test data is given in Table 13. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistor. S1 = Test selection switch. Fig 14. Load circuitry for switching times Table 13: Test data Test Input Load S1 position VI Vis tr, tf CL RL at fmax other tPHL, tPLH [1] pulse < 2 ns 6 ns 15 pF, 50 pF 1 k Ω open tPZH, tPHZ [1] VCC < 2 ns 6 ns 15 pF, 50 pF 1 k Ω VEE tPZL, tPLZ [1] VEE < 2 ns 6 ns 15 pF, 50 pF 1 k Ω VCC VM VM tW tW 10 % 90 % 0 V VI VI negative pulse positive pulse 0 V VM VM 90 % 10 % tf tr tr tf 001aae382 VCC VCC open GND VEE VI Vos DUT CL RT RL S1 PULSE GENERATOR Vis |
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