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7.3.3 COT Mode Light-Load Operation

Diode emulation mode (DEM) operation occurs when the low-side MOSFET switches off as inductor valley

current reaches zero. Here, the load current is less than half of the peak-to-peak inductor current ripple in

CCM. Turning off the low-side MOSFET at zero current reduces switching loss, and preventing negative current

conduction reduces conduction loss. Power conversion efficiency is thus higher in a DEM converter than an

equivalent forced-PWM CCM converter. With DEM operation, the duration that both power MOSFETs remain off

progressively increases as load current decreases.

7.3.4 Low Dropout Operation and 100% Duty Cycle Mode

If RDSON1 and RDSON2 are the high-side and low-side MOSFET on-state resistances, respectively, and RDCR is

the inductor DC resistance, the duty cycle in COT (CCM) or PFM mode is given by Equation 3.

OUT

DSON2

DCR

OUT

DSON1

DSON2

OUT

(3)

The LM5165-Q1 offers a low input voltage to output voltage dropout by engaging the high-side MOSFET at

100% duty cycle. In COT mode, a frequency foldback feature effectively extends maximum duty cycle to 100%

during low dropout conditions or load-on transients. Based on the 4-mV FB comparator dropout hysteresis, the

duty cycle extends as needed at low input voltage conditions, corresponding to lower switching frequency. The

PWM on-time extends based on the requirement that the FB voltage exceeds the dropout hysteresis during

a given on-time. 100% duty cycle operation is eventually reached as the input voltage decreases towards the

output setpoint. The output voltage stays in regulation at a lower supply voltage, thus achieving an extremely low

dropout voltage.

Note that PFM mode operation provides an inherently natural transition to 100% duty cycle if needed for low

dropout applications.

Use Equation 4 to calculate the minimum input voltage to maintain output regulation.

IN(min)

OUT

DSON1

DCR

(4)

7.3.5 Adjustable Output Voltage (FB)

Three voltage feedback options are available: the fixed 3.3-V and 5-V versions include internal feedback

resistors that sense the output directly through the VOUT pin; the adjustable voltage option senses the output

through an external resistor divider connected from the output to the FB pin.

The LM5165-Q1 voltage regulation loop regulates the output voltage by maintaining the FB voltage equal to the

internal reference voltage, VREF1. A resistor divider programs the ratio from output voltage VOUT to FB. For a

target VOUT setpoint, calculate RFB2 based on the selected RFB1 using Equation 5.

FB2

FB1

OUT

1.223V

(5)

Selecting RFB1 of 100 kΩ is recommended for most applications. A larger RFB1 consumes less DC current,

mandatory if light-load efficiency is critical. High feedback resistances generally require more careful feedback

path PCB layout. It is important to route the feedback trace away from the noisy area of the PCB. For more

layout recommendations, see Layout.

7.3.6 Adjustable Current Limit

The LM5165-Q1 manages overcurrent conditions by cycle-by-cycle current limiting of the peak inductor current.

The current sensed in the high-side MOSFET is compared every switching cycle to the current limit threshold

set by the ILIM pin. Current is sensed after a leading-edge blanking time following the high-side MOSFET turnon

transition. The propagation delay of current limit comparator is 100 ns.

www.ti.com

LM5165-Q1

SNVSAJ3C – MARCH 2016 – REVISED DECEMBER 2022

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