Description (Continued)

Block Diagram

The AT28C64 is accessed like a Static RAM for the read

or write cycles without the need for external components.

During a byte write, the address and data are latched in-

ternally, freeing the microprocessor address and data bus

for other operations. Following the initiation of a write cy-

cle, the device will go to a busy state and automatically

clear and write the latched data using an internal control

timer. The device includes two methods for detecting the

end of a write cycle, level detection of RDY/BUSY (unless

of a write cycle has been detected, a new access for a

read or write can begin.

The CMOS technology offers fast access times of 120 ns

at low power dissipation. When the chip is deselected the

standby current is less than 100

µA.

Atmel’s 28C64 has additional features to ensure high

quality and manufacturability. The device utilizes error cor-

rection internally for extended endurance and for im-

proved data retention characteristics. An extra 32-bytes of

Temperature Under Bias................. -55°C to +125°C

Storage Temperature...................... -65°C to +150°C

All Input Voltages

(including NC Pins)

with Respect to Ground ................... -0.6V to +6.25V

All Output Voltages

Voltage on OE and A9

with Respect to Ground ................... -0.6V to +13.5V

*NOTICE: Stresses beyond those listed under “Absolute Maxi-

mum Ratings” may cause permanent damage to the device.

This is a stress rating only and functional operation of the

device at these or any other conditions beyond those indi-

cated in the operational sections of this specification is not

implied. Exposure to absolute maximum rating conditions

for extended periods may affect device reliability.

Absolute Maximum Ratings*

2-194

AT28C64/X