MP2307 – 3A, 23V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER

MP2307 Rev. 1.9

www.MonolithicPower.com

9

5/28/2008

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© 2008 MPS. All Rights Reserved.

The system has one zero of importance, due to the

compensation capacitor (C3) and the compensation

resistor (R3). This zero is located at:

3

R

3

C

2

1

f 1

Z

×

×

π

=

The system may have another zero of

importance, if the output capacitor has a large

capacitance and/or a high ESR value. The zero,

due to the ESR and capacitance of the output

capacitor, is located at:

ESR

ESR

R

2

C

2

1

f

×

×

π

=

In this case, a third pole set by the

compensation

capacitor

(C6)

and

the

compensation

resistor

(R3)

is

used

to

compensate the effect of the ESR zero on the

loop gain. This pole is located at:

3

R

6

C

2

1

f 3

P

×

×

π

=

The goal of compensation design is to shape

the converter transfer function to get a desired

loop gain. The system crossover frequency

where the feedback loop has the unity gain is

important. Lower crossover frequencies result

in slower line and load transient responses,

while higher crossover frequencies could cause

system instability. A good standard is to set the

crossover frequency below one-tenth of the

switching frequency.

To optimize the compensation components, the

following procedure can be used.

1. Choose the compensation resistor (R3) to set

the desired crossover frequency.

Determine R3 by the following equation:

FB

OUT

CS

EA

S

FB

OUT

CS

EA

C

V

V

G

G

f

1

.

0

2

C

2

V

V

G

G

f

2

C

2

3

R

×

×

×

×

×

π

<

×

×

×

×

π

=

Where fC is the desired crossover frequency

which is typically below one tenth of the

switching frequency.

2. Choose the compensation capacitor (C3) to

achieve

the

desired

phase

margin.

For

applications with typical inductor values, setting

the compensation zero (fZ1) below one-forth of

the crossover frequency provides sufficient

phase margin.

Determine C3 by the following equation:

C

f

3

R

2

4

3

C

×

×

π

>

Where R3 is the compensation resistor.

3. Determine if the second compensation

capacitor (C6) is required. It is required if the

ESR zero of the output capacitor is located at

less than half of the switching frequency, or the

following relationship is valid:

2

f

R

2

C

2

1

S

ESR

<

×

×

π

If this is the case, then add the second

compensation capacitor (C6) to set the pole fP3

at the location of the ESR zero. Determine C6

by the equation:

3

R

R

2

C

6

C

ESR

×

=

PCB Layout Guide

PCB layout is very important to achieve stable

operation. It is highly recommended to duplicate

EVB layout for optimum performance.

If change is necessary, please follow these

guidelines and take Figure2 for reference.

1) Keep the path of switching current short

and minimize the loop area formed by Input

cap., high-side MOSFET and low-side

MOSFET.

2) Bypass ceramic capacitors are suggested

to be put close to the Vin Pin.

3) Ensure all feedback connections are short

and direct. Place the feedback resistors

and compensation components as close to

the chip as possible.

4) ROUT SW away from sensitive analog areas

such as FB.