IMX8MPCEC datasheet(36/111 Pages) NXP

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i.MX 8M Plus Applications Processor Datasheet for Consumer Products, Rev. 0, 03/2021

NXP Semiconductors

Electrical characteristics

Table 24 represents the timing parameters of the power-down sequence.

3.3

PLL electrical characteristics

Table 24. Power-down sequence

Description

Min

Typ

Max

Unit

Delay from digital 2.5 V and 3.3 V off to NVCC_DRAM off

—

Delay from NVCC_DRAM off to digital 1.8 V off

—

Delay from digital 1.8 V off to analog 1.8 V off

—

Delay from analog 1.8 V off to VDD_ARM off

—

Delay from VDD_ARM off to VDD_SOC off

—

During power-down, make sure NVCC_xxx - PVCCx_1P8 < 2 V.

Table 25. PLL electrical parameters

PLL type

Parameter

Value

AUDIO_PLL1

Clock output range

650 MHz — 1.3 GHz

Reference clock

24 MHz

Lock time

µs

Jitter

±1% of output period,

50 ps

AUDIO_PLL2

Clock output range

650 MHz — 1.3 GHz

Reference clock

24 MHz

Lock time

µs

Jitter

±1% of output period,

 50 ps

VIDEO_PLL1

Clock output range

650 MHz — 1190 MHz

Reference clock

24 MHz

Lock time

µs

AV_PLL

Clock output range

552 MHz — 1368 MHz

Reference clock

24 MHz

Lock time

µs

SAI_PLL

Clock output range

25 MHz — 100 MHz

Reference clock

24 MHz

Lock time

µs

HSIO_PLL

Clock output range

100 MHz

Reference clock

24 MHz

Lock time

µs

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