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PARAMETERS

SYMBOL

MIN.

TYP. (5)

MAX.

UNITS

TEST CONDITIONS

Input Clamp Voltage

VIK

-1.5

V

IL = -18mA

Output Voltage

VO

0

6

V

IO = 0

Differential Output Voltage

1.5

6

V

IO = 0

Differential Output Voltage (6)

1.5

2.5

5

V

RL = 54Ω

Differential Output Voltage

VOD3

1.5

5

V

Vtest = -7 to 12V

Change in Magnitude of (7)

Differential Output Voltage

∆

±0.2

V

RL = 54 or 100Ω

Common Mode Output Voltage

VOC

3

V

RL = 54 or 100Ω

-1

Change in Magnitude of (7)

Common Mode Output Voltage

∆

±0.2

V

RL = 54 or 100Ω

Output Current (4)

1

mA

Output Disabled VO = 12

IO

-0.8

mA

VO = -7

High Level Input Current

IIH

10

µA

VI = 3.5V

Low Level Input Current

IIL

-10

µA

VI = 0.4V

Short-Circuit Output Current

-250

mA

VO = -6

-150

mA

VO = 0

IOS

250

mA

VO = 8

Supply Current

(VDD2 = +5V)

IDD2

27

34

mA

No Load (Outputs Enabled)

(VDD1 = +5V)

IDD1

5

10

mA

Switching Characteristics

Maximum Data Rate

35

Mbd

RL = 54Ω, CL = 50pF

Differential Output Delay Time

tD (OD)

16

25

ns

RL = 54Ω, CL = 50pF

Pulse Skew (10)

tSK (P)

1

6

ns

RL = 54Ω, CL = 50pF

Differential Output Transition Time

tT (OD)

8

10

ns

RL = 54Ω, CL = 50pF

Output Enable Time to High Level

tPZH

31

65

ns

RL = 54Ω, CL = 50pF

Output Enable Time to Low Level

tPZL

22

35

ns

RL = 54Ω, CL = 50pF

Output Disable Time from High Level

tPHZ

28

50

ns

RL = 54Ω, CL = 50pF

Output Disable Time from Low Level

tPLZ

16

32

ns

RL = 54Ω, CL = 50pF

Skew Limit (3)

tSK (LIM)

2

8

ns

RL = 54Ω, CL = 50pF

Driver Section Specifications

All Specifications are Tmin to Tmax unless otherwise stated

1.

All Voltage values are with respect to network ground except differential

I/O bus voltages.

2.

Differential input/output voltage is measured at the noninverting

terminal A/Y with respect to the inverting terminal B/Z.

3.

Skew limit is the maximum difference in any two channels in one

device.

4.

The power-off measurement in ANSI Standard EIA/TIA-422-B applies

to disabled outputs only and is not applied to combined inputs and outputs.

5.

All typical values are at VDD1, VDD2 = 5V and TA = 25°C.

6.

The minimum VOD2 with a 100Ω load is either ½VOD1 or 2V,

whichever is greater.

7.

∆

respectively, that occur when the input is changed form one logic state to

the other.

8.

This applies for both power on and power off, refer to ANSI standard

RS-485 for exact condition. The EIA/TIA-422-B limit does not apply for a

combined driver and receiver terminal.

9.

Includes 8 ns read enable time. Maximum propagation delay is 25 ns

after read assertion.

10. Pulse skew is defined as the

Notes