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821024 Datasheet(PDF) 1 Page - Renesas Technology Corp |
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821024 Datasheet(HTML) 1 Page - Renesas Technology Corp |
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1 / 15 page ![]() QUAD NON-PROGRAMMABLE PCM CODEC 821024 DATASHEET 821024 REVISION A JUNE 25, 2014 1 ©2014 Integrated Device Technology, Inc. FEATURES • 4 channel CODEC with on-chip digital filters • Selectable A-law or μ-law companding • Master clock frequency selection: 2.048 MHz, 4.096 MHz or 8.192 MHz - Internal timing automatically adjusted based on MCLK and frame sync signal • Separate PCM and master clocks • Single PCM port with up to 8.192 MHz data rate (128 time slots) • Transhybrid balance impedance hardware adjustable via external components • Transmit gains hardware adjustable via external components • Low power +5.0 V CMOS technology • +5.0 V single power supply • Package available: 32 pin PLCC, 44 pin TQFP FUNCTIONAL BLOCK DIAGRAM DESCRIPTION The IDT821024 is a single-chip, four channel PCM CODEC with on- chip filters. The device provides analog-to-digital and digital-to-analog conversions and supports both a-law and μ−law companding. The digital filters in IDT821024 provides the necessary transmit and receive filtering for voice telephone circuit to interface with time-division multiplexed systems. All of the digital filters are performed in digital signal processors operating from an internal clock, which is derived from MCLK. The fixed filters set the transmit and receive gain and frequency response. In the IDT821024 the PCM data is transmitted to and received from the PCM highway in time slots determined by the individual Frame Sync signals (FSR n and FSXn, where n = 1-4) at rates from 256 KHz to 8.192 MHz. Both Long and Short Frame Sync modes are available in the IDT821024. The IDT821024 can be used in digital telecommunication applications such as PBX, Central Office Switch, Digital Telephone and Integrated Voice/Data Access Unit. |
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