FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/

LVTTL FREQUENCY SYNTHESIZER

840002 DATA SHEET

2

REVISION C 11/10/14

TABLE 1. PIN DESCRIPTIONS

TABLE 2. PIN CHARACTERISTICS

TABLE 3. FREQUENCY SELECT FUNCTION TABLE

Number

Name

Type

Description

1

F_SEL0

Input

Pullup

Frequency select pin. LVCMOS/LVTTL interface levels.

2

nXTAL_SEL

Input

Pulldown

Selects between the crystal or TEST_CLK inputs as the PLL reference

source. When HIGH, selects TEST_CLK. When LOW, selects XTAL

inputs. LVCMOS/LVTTL interface levels.

3

TEST_CLK

Input

Pulldown

Single-ended LVCMOS/LVTTL clock input.

4

OE

Input

Pullup

Output enable pin. When HIGH, the outputs are active. When LOW, the

outputs are in a high impedance state. LVCMOS/LVTTL interface levels.

5

MR

Input

Pulldown

Active HIGH Master Reset. When logic HIGH, the internal dividers are

reset causing active outputs to go low. When logic LOW, the internal

dividers and the outputs are enabled. LVCMOS/LVTTL interface levels.

6

nPLL_SEL

Input

Pulldown

PLL Bypass. When LOW, the output is driven from the VCO output.

When HIGH, the PLL is bypassed and the output frequency = reference

clock frequency/n output divider.

LVCMOS/LVTTL interface levels.

7V

DDA

Power

Analog supply pin.

8V

DD

Power

Core supply pin.

9,

10

XTAL_OUT,

XTAL_IN

Input

Crystal oscillator interface.

11

V

DDO

Power

Output supply pin.

12, 13

Q1, Q0

Output

Single-ended clock outputs. LVCMOS/LVTTL interface levels.

14, 15

GND

Power

Power supply ground.

16

F_SEL1

Input

Pullup

Frequency select pin. LVCMOS/LVTTL interface levels.

NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.

Input Frequency

(MHz)

Inputs

Output Frequency

(MHz)

F_SEL1

F_SEL0

M Divider Value

N Divider Value

M/N Divider Value

26.5625

0

0

24

3

8

212.5

26.5625

0

1

24

4

6

159.375

26.5625

1

0

24

6

4

106.25

26.5625

1

1

24

12

2

53.125

26.04166

0

1

24

4

6

156.25

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

C

IN

Input Capacitance

4

pF

C

PD

Power Dissipation Capacitance

8

pF

R

PULLUP

Input Pullup Resistor

51

k

Ω

R

PULLDOWN

Input Pulldown Resistor

51

k

Ω

R

OUT

Output Impedance

3.3V±5%

14

17

21

Ω

2.5V±5%

16

21

25

Ω