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PD69100 Datasheet(PDF) 3 Page - Microsemi Corporation |
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PD69100 Datasheet(HTML) 3 Page - Microsemi Corporation |
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3 / 5 page ![]() PD69100 DATASHEET Copyright © 2010 Microsemi Rev. 1.1, Dec. 2010 Analog Mixed Signal Group 2381 Morse Avenue, Irvine, CA 92614, USA; Within the USA: (800) 713-4113, Outside the USA: (949) 221-7100 Fax: (949) 756-0308 3 PoE Controller Unit TM ® M A I N F E AT U RE S D ESC R IP TIO N Function Description Supports up to eight PoE devices – 96 ports Up to 12 PoE devices can be cascaded, fitting into a 96 port PoE system that utilizes one PoE controller (PD69100) Power Management The system supports three power management modes: Class (LLDP) mode, Dynamic mode and Static mode. For more details see technical note 113, catalogue number 06-0002-081. Threshold Configuration Configure overvoltage and under-voltage thresholds for disconnection purposes. High power ports, 2 pairs or 4 pairs PoE devices can be configured (both hardware and software) to enable higher current through ports (up to ~720mA) or double power RJ in case of 4 pairs. Communication Supports both I 2C and UART interfaces with Host CPU. Legacy (capacitor) Detection Enables detection and powering of pre-standard devices (PDs). LED Stream Direct SPI interface to an external LED stream circuitry. Enables designers to implement a simple LED circuit that does not require a software code. System OK Indication Digital output pin to Host, indicating voltage and temperature range are valid. System and Port Measurements Measurements of the following parameters: Current (mA), Power Consumption (W), Vmain (V), Port Voltage (V), PD Class (0-4). Detailed Port Status Port statuses are received from PoE managers. Statuses such as ‘port on’ and ‘port off due to disconnection or due to overload’ Interrupt Pin Interrupt out from PoE controller indicating events such as: port on, port off, port fault, PoE device fault, voltage out of range, and more. For a full list of interrupt events refer to Serial Communication Protocol, catalogue number 06-0032-056. Port Power Limit Configurable port power limit; when a port exceeds the limit, it is automatically disconnected Port Matrix Control Enables layout designers to connect all physical ports to logical ports whenever required. ‘Power Good’ Interrupt from Power Supply Directly to POE Drivers. For systems comprising more than a single power supply, in case one power supply fails, a fast port disconnection mechanism is executed to maintain operation and prevent collapse of other power supplies. I 2 C ADDR E S S S E L E CT I O N I 2C interface between Host CPU and a specific PD69000 requires setting the device address; this is done by applying a specific voltage level to pin #25 (I2C_ADDR) as shown below: I 2 C _ AD DR V O L TA G E L EV EL I 2 C A DD RE S S ( H E X AD E CI M AL ) 0.00 to 0.21VDC UART 0.21 to 0.41VDC 0x4 0.41 to 0.62VDC 0x8 0.62 to 0.83VDC 0xC 0.83 to 1.03VDC 0x10 1.03 to 1.24VDC 0x14 1.24 to 1.44VDC 0x18 1.44 to 1.65VDC 0x1C 1.65 to 1.86VDC 0x20 1.86 to 2.06VDC 0x24 2.06 to 2.27VDC 0x28 2.27 to 2.48VDC 0x2C 2.48 to 2.68VDC 0x30 2.68 to 2.89VDC 0x34 2.89 to 3.09VDC 0x38 3.09 to 3.30VDC 0x3C |
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