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STM8AF6366TAY Datasheet(PDF) 79 Page - STMicroelectronics |
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STM8AF6366TAY Datasheet(HTML) 79 Page - STMicroelectronics |
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79 / 116 page  DocID031156 Rev 1 79/116 STM8AF6388 Electrical characteristics 114 Figure 37. Typical NRST pull-up resistance RPU vs VDD Figure 38. Typical NRST pull-up current Ipu vs VDD The reset network shown in Figure 39 protects the device against parasitic resets. The user must ensure that the level on the NRST pin can go below VIL(NRST) max (see Table 37: NRST pin characteristics), otherwise the reset is not taken into account internally. For power consumption sensitive applications, the external reset capacitor value can be reduced to limit the charge/discharge current. If NRST signal is used to reset external circuitry, attention must be taken to the charge/discharge time of the external capacitor to fulfill the external devices reset timing conditions. Minimum recommended capacity is 10 nF. 30 35 40 45 50 55 60 2.5 3 3.5 4 4.5 5 5.5 6 V DD [V] -40°C 25°C 85°C 125°C 0 20 40 60 80 100 120 140 01 2 3 4 5 6 V DD [V] -40°C 25°C 85°C 125°C |
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