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71V424 Datasheet(PDF) 2 Page - Renesas Technology Corp |
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71V424 Datasheet(HTML) 2 Page - Renesas Technology Corp |
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2 / 11 page ![]() 6.42 2 71V424S, 71V424L, 3.3V CMOS Static RAM 4 Meg (512K x 8-bit) Commercial and Industrial Temperature Ranges May.04.21 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 A5 NC NC A9 A8 A7 WE I/03 I/02 VSS VDD I/01 I/00 CS A2 A1 A0 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 NC NC A15 OE I/07 I/06 VSS VDD I/05 I/04 A14 A13 A11 A10 NC NC NC NC A12 3622 drw 11 NC NC A3 A4 A6 A16 A17 A18 PHG44 71V424 A0 A1 A2 A3 CS I/O0 VDD VSS I/O2 WE A4 A5 A6 A7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 NC A18 A17 A16 OE I/O7 I/O6 VSS VDD I/O5 A14 A13 A12 A11 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 PBG36 17 18 19 20 I/O1 I/O3 I/O4 NC A8 A9 A10 A15 3622 drw 02 71V424 SOJ Top View Pin Configurations(1) Truth Table(1,2) Capacitance (TA = +25°C, f = 1.0MHz, SOJ package) TSOP Top View A0 – A18 Address Inputs Input CS Chip Select Input WE Write Enable Input OE Output Enable Input I/O0 - I/O7 Data Input/Output I/O VDD 3.3V Power Power VSS Ground Gnd 3622 tbl 02 Pin Description Symbol Parameter(1) Conditions Max. Unit CIN Input Capacitance VIN = 3dV 7 pF CI/O I/O Capacitance VOUT = 3dV 8 pF 3622 tbl 03 NOTE: 1. This parameter is guaranteed by device characterization, but not production tested. CS OE WE I/O Function LL H DATAOUT Read Data LX L DATAIN Write Data L H H High-Z Output Disabled H X X High-Z Deselected - Standby (ISB) VHC(3) X X High-Z Deselected - Standby (ISB1) 3622 tbl 01 NOTES: 1. H = VIH, L = VIL, x = Don't care. 2. VLC = 0.2V, VHC = VDD -0.2V. 3. Other inputs ≥VHC or ≤VLC. NOTE: 1. This text does not indicate orientation of actual part-marking. |
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