Philips Semiconductors

Preliminary specification

83C453/87C453

80C51 8-bit microcontroller family

8K/256 OTP/ROM, expanded I/O

1998 Apr 23

13

INTERNAL BUS

IDS

MODE

INPUT

BUFFER

(P6 READ)

OUTPUT

DRIVERS

BFLAG/ODS

MODE

(CSR.6/.7)

AFLAG

MODE

(CSR.4/.5)

MUX

CONTROL/STATUS

REGISTER (CSR)

OUTPUT BUFFER

(P6 WRITE)

INPUT BUFFER

FULL (CSR.0)

OUTPUT BUFFER

FULL (CSR.1)

EDGE/LEVEL

SELECT (CSR.2)

IDS

ODS

BFLAG

AFLAG

PORT 6

SU00087

Figure 8. Port 6 Block Diagram

Table 3. Special Function Register Addresses

REGISTER ADDRESS

BIT ADDRESS

Name

Symbol

Address

MSB

LSB

Port 4

P4

C0

C7

C6

C5

C4

C3

C2

C1

C0

Port 5

P5

C8

CF

CE

CD

CC

CB

CA

C9

C8

Port 6 data

P6

D8

DF

DE

DD

DC

DB

DA

D9

D8

Port 6 control status

CSR

E8

EF

EE

ED

EC

EB

EA

E9

E8

Slave address

SADDR

A9

Slave address mask

SADEN

B9

Auxiliary Register

AUXR

8E

Table 4. Control Status Register (CSR)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

MB1

MB0

MA1

MA0

OBFC

IDSM

OBF

IBF

BFLAG Mode Select

AFLAG Mode Select

Output Buffer

Flag Clear

Mode

Input Data

Strobe Mode

Output Buffer

Flag Full

Input Buffer

Flag Full

0/0 = Logic 0 output*

0/1 = Logic 1 output*

1/0 = IBF output

1/1 = PE input

(0 = Select)

(1 = Disable I/O)

0/0 = Logic 0 output*

0/1 = Logic 1 output*

1/0 = OBF output

1/1 = SEL input

(0 = Select)

(1 = Control/status)

0 = Negative

edge of ODS

1 = Positive

edge o ODS

0 = Positive

edge of IDS

1 = Low level

of IDS

0 = Output

data buffer

empty

1 = Output

data buffer full

0 = Input data

buffer empty

1 = Input data

buffer full

NOTE:

*

Output-always mode: MB1 = 0, MA1 = 1, and MA0 = 0. In this mode, port 6 is always enabled for output. ODS only clears the OBF flag.