P9221-R3 datasheet(34/46 Pages) RENESAS

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P9221-R3 Datasheet

October 20, 2017

Table 26. Command Register

Address and Bit

R/W

Default

Function and Description

004EHEX [7:6]

Reserved

0BIN

Reserved.

004EHEX [5]

Reset_Interrupt_Pin

0BIN

If the application processor sets this bit to "1," the P9221-R3

resets the interrupt pin. The P9221-R3 will reset the bit to “0”

after resetting the interrupt pin.

004EHEX [4]

Send_Battery_Charge

Status_packet

0BIN

If the application processor sets this bit to "1,” then the

P9221-R3 sends the charge status packet once (from the

Batt_Charge_status register; see Table 17) and then sets this

bit to “0.”

004EHEX [3]

Send_End_Power_Transfer

0BIN

If the application processor sets this bit to "1," the P9221-R3

sends the End Power Transfer packet (defined in the

EPT_Code register in Table 18) to the transmitter and then

sets this bit to "0."

004EHEX [2]

Reserved

0BIN

Reserved.

004EHEX [1]

Toggle_LDO_On-OFF

0BIN

If the application processor sets this bit to "1,” the P9221-R3

toggles the LDO output once (from on to off or from off to on),

and then sets this bit to “0.”

004EHEX [0]

Communication_trigger

0BIN

If the communication channel is free, this bit is set to “0.” The

application processor sets this bit to "1” to trigger the

communication. The P9221-R3 will reset this bit to “0”

immediately after sending the data into the channel.

Table 27. Clear Interrupt Bits

Address and Bit

R/W

Default

Function and Description

0056HEX [7]

Clear_Vout_Changed_Bit

0BIN

“1” clears the INT_Vout_Status bit in the register 0036HEX.

resets the interrupt pin by writing “1” to bit 5 of register

004EHEX.

0056HEX [6]

Reserved

0BIN

0056HEX [5]

Reserved

0BIN

0056HEX [4]

Clear_User_Data_Received

_Bit

0BIN

“1” clears the User_Data_Received_status bit in register

0036HEX. Register 0036HEX is updated after the application

processor resets the interrupt pin by writing“1” to bit 5 of

0056HEX [3]

Reserved

0BIN

0056HEX [2]

Clear_Over_Temperature_

Bit

0BIN

“1” clears the INT_OVER_TEMP_Status bit in register

0036HEX. Register 0036HEX is updated after the application

processor resets the interrupt pin by writing“1” to bit 5 of

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