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PDTD113ES Datasheet(PDF) 4 Page - Nexperia B.V. All rights reserved |
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PDTD113ES Datasheet(HTML) 4 Page - Nexperia B.V. All rights reserved |
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4 / 11 page ![]() PDTD113E_SER_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 16 November 2009 3 of 10 NXP Semiconductors PDTD113E series NPN 500 mA resistor-equipped transistors; R1 = 1 k Ω, R2 = 1 kΩ 3. Ordering information [1] Also available in SOT54A and SOT54 variant packages (see Section 2 and Section 9). 4. Marking [1] * = -: made in Hong Kong * = p: made in Hong Kong * = t: made in Malaysia * = W: made in China 5. Limiting values [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. Table 4. Ordering information Type number Package Name Description Version PDTD113EK SC-59A plastic surface mounted package; 3 leads SOT346 PDTD113ES[1] SC-43A plastic single-ended leaded (through hole) package; 3 leads SOT54 PDTD113ET - plastic surface mounted package; 3 leads SOT23 Table 5. Marking codes Type number Marking code[1] PDTD113EK E1 PDTD113ES D113ES PDTD113ET *7R Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCBO collector-base voltage open emitter - 50 V VCEO collector-emitter voltage open base - 50 V VEBO emitter-base voltage open collector - 10 V VI input voltage positive - +10 V negative - −10 V IO output current (DC) - 500 mA Ptot total power dissipation Tamb ≤ 25 °C [1] SOT346 - 250 mW SOT54 - 500 mW SOT23 - 250 mW Tstg storage temperature −65 +150 °C Tj junction temperature - 150 °C Tamb ambient temperature −65 +150 °C |
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