HFA1412

FN4152 Rev 4.00

Page 2 of 13

January 23, 2006

Absolute Maximum Ratings

Thermal Information

Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11V

DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY

Output Current (Note 1) . . . . . . . . . . . . . . . . Short Circuit Protected

ESD Rating

Human Body Model (Per MIL-STD-883 Method 3015.7) . . . .600V

Operating Conditions

Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C

Thermal Resistance (Typical, Note 2)

JA (°C/W)

PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . . . . . .

100

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

120

Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . 175°C

Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C

Maximum Storage Temperature Range . . . . . . . . . . -65°C

to 150°C

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C

(SOIC-Lead Tips Only)

*Pb-free PDIPs can be used for through hole wave solder processing

only. They are not intended for use in Reflow solder processing

applications.

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

1. Output is protected for short circuits to ground. Brief short circuits to ground will not degrade reliability, however, continuous (100% duty cycle)

output current should not exceed 30mA for maximum reliability.

2.

JA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications

VSUPPLY = 5V, AV = +1, RL = 100 Unless Otherwise Specified.

PARAMETER

TEST

CONDITIONS

(NOTE 3)

TEST

LEVEL

TEMP

(°C)

MIN

TYP

MAX

UNITS

INPUT CHARACTERISTICS

Output Offset Voltage

A

25

-

2

10

mV

AFull

-

3

15

mV

Average Output Offset Voltage Drift

B

Full

-

22

70

V/°C

Channel-to-Channel Output Offset

Voltage Mismatch

A

25

-

-

15

mV

AFull

-

-

30

mV

Common-Mode Rejection Ratio

VCM = 1.8V

A

25

42

45

-

dB

VCM = 1.8V

A

85

40

44

-

dB

VCM = 1.2V

A

-40

40

45

-

dB

Power Supply Rejection Ratio

VPS = 1.8V

A

25

45

49

-

dB

VPS = 1.8V

A

85

43

48

-

dB

VPS = 1.2V

A

-40

43

48

-

dB

Non-Inverting Input Bias Current

A

25

-

1

15

A

AFull

-

3

25

A

Non-Inverting Input Bias Current Drift

B

Full

-

30

80

nA/

°C

Channel-to-Channel Non-Inverting Input

Bias Current Mismatch

A

25

-

-

15

A

AFull

-

-

25

A

Non-Inverting Input Bias Current Power

Supply Sensitivity

VPS = 1.25V

A

25

-

0.5

1

A/V

AFull

-

-

3

A/V

Non-Inverting Input Resistance

VCM = 1.8V

A

25

0.8

1.1

-

M



VCM = 1.8V

A

85

0.5

1.4

-

M



VCM = 1.2V

A

-40

0.5

1.3

-

M



Inverting Input Resistance

C

25

-

425

-



Input Capacitance (either input)

C

25

-

2

-

pF

Input Voltage Common Mode Range

(Implied by VIO CMRR and +RIN tests)

A

25, 85

1.8

2.4

-

V

A-40

1.2

1.7

-

V

Input Noise Voltage Density (Note 4)

f = 100kHz

B

25

-

7

-

nV/

Hz