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HIP0051 Datasheet(PDF) 1 Page - Renesas Technology Corp

Part # HIP0051
Description  0.25A/50V Octal Low Side Power Driver with Serial Bus Control
PDF  6 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HIP0051 Datasheet(HTML) 1 Page - Renesas Technology Corp

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FN4155 Rev.0.00
Page 1 of 6
June 1996
FN4155
Rev.0.00
June 1996
HIP0051
0.25A/50V Octal Low Side Power Driver with Serial Bus Control
DATASHEET
Features
• Eight Open Drain - NDMOS Low Side Drivers Each
Capable of 250mA
• High Voltage Power BiMOS with Low Idle and Standby
Current
• Over-Voltage Clamp Protection
- Each Output. . . . . . . . . . . . . . . . . . . . . . . . 50V Typical
• Serial Data Input, Parallel Output Power Drive
• Common Enable for Output Drivers and Data Storage
Register
•-40oC to 85oC Operating Range
Applications
• Automotive and Industrial Systems
• Solenoids, Relays and Lamp Drivers
• Logic and
P Controlled Drivers
• Robotic Controls
Description
The HIP0051 is a logic controlled, eight channel Octal Low
Side Power Driver. As shown in the Block Diagram, the
outputs are controlled via the serial data interface which
allows the data to be shifted out, allowing control of other
cascaded serial devices.
The HIP0051 is fabricated in a Power BiMOS IC process,
and is intended for use in automotive and other applications
having a wide range of temperature and electrical stress
conditions. It is particularly suited for driving lamps, displays,
relays, and solenoids in applications where low operating
power, high breakdown voltage, and high output current at
high temperature is required.
Ordering Information
PART
NUMBER
TEMP.
RANGE (oC)
PACKAGE
PKG.
NO.
HIP0051IB
-40 to 85
20 Ld SOIC
M20.3
Pinout
HIP0051
(SOIC)
TOP VIEW
Block Diagram
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
GND
VCC
SI
DR0
DR1
DR2
NC
DR3
EN
GND
GND
SO
DR7
DR6
LGND
DR5
DR4
SCK
STR
GND
SCK
OUTPUT
OUTPUT DRIVER
(CHANNEL 1 OF 8)
DR#0
LATCH
EN
(STROBE)
SI
SO
SERIAL
(SPI)
PARALLEL
(DATA IS
REGISTER
INPUT
STR
(ENABLE)
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
STROBED)
WHEN
LATCHED
OUTPUT
8-BIT


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