HIP0060

FN4045 Rev 0.00

Page 2 of 7

July 1997

Absolute Maximum Ratings

Thermal Information

Max Output Voltage, VOUT (Note 2) . . . . . . . . . . . . . . . . . . . . . VOC

Max Output Load Current, ILOAD (Per Output, Note 3) . . . . . . . . ICL

Logic Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V

Logic Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . -0.3V to +7V

Operating Conditions

Ambient Temperature Range . . . . . . . . . . . . . . . . . -40oC to 125oC

Junction Temperature Range . . . . . . . . . . . . . . . . . -40oC to 150oC

Thermal Resistance (Typical, Notes 1, 4)

JA (oC/W)

SOIC - PC Board Mount, Min. Copper . . . . . . . . . .

60

SOIC - PC Board Mount, 2 sq. in. Copper . . . . . . . .

35

Maximum Storage Temperature Range -55oC to 150oC

Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300oC

(SOIC - Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

1.

JA is measured with the component mounted on an evaluation PC board in free air.

2. The MOSFET Output Drain is internally clamped with a Drain-to-Gate zener diode that turns on the MOSFET; holding the Drain at the Output

Clamp voltage VOC.

3. The output drive is protected by an internal current limit. The ICL over-current limiting threshold parameter specification defines the maximum

current. The maximum current with all outputs ON may be further limited by dissipation.

4. Device dissipation is based on thermal resistance capability of the package in a normal operating environment. The junction to ambient thermal

resistance of 60oC/W is defined here as a PC Board mounted device with minimal copper. With approximately 2 square inches of copper area

as a heat sink, it is practical to achieve 35oC/W thermal resistance. Further reduction in the thermal resistance can be achieved with additional

PC Board Copper ground area or an external heat sink structure next to the ground leads at the center of the package.

Electrical Specifications

VDD = 4.5V to 5.5V, VSS = 0V, TA = -40oC to 125oC; Unless Otherwise Specified

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

OUTPUTS DRIVERS (DR0 TO DR7)

Output Channel Resistance

rDSON

IOUT = 0.5A

-

-

0.8



Over-Current Limiting Threshold

ICL

1.5

-

3.5

A

Output Clamping Voltage

VOC

40

50

60

V

Output Clamping Energy

EOC

1ms Single Pulse Width, TA = 25oC,

(Refer to Figure 3 for SOA Limits).

-85

-

mJ

Output OFF Leakage Current

ILK

VOUT = 14.5V

-

-

180

A

Open-Load Fault Threshold

ROLD

VOUT = 14.5V, Output Off

4

-

200

k



Output Rise Time

tR

RL = 30VOUT = 14.5V

1

-

12

s

Output Fall Time

tF

RL = 30VOUT = 14.5V

1

-

12

s

Turn-On Delay

tON

RL = 30VOUT = 14.5V

-

-

12

s

Turn-Off Delay

tOFF

RL = 30VOUT = 14.5V

-

-

12

s

POWER SUPPLY

Power On Reset Threshold

VDD(POR)

3.2

-

4.4

V

VDD Logic Supply Current

IDD

All Outputs ON or OFF

-

-

10

mA

LOGIC INPUTS (INx, SI, SCK, RST, CS)

High Level Input Voltage

VIH

0.7xVDD

--

V

Low Level Input Voltage

VIL

--

0.2xVDD

V

Input Hysteresis

VILHYS

0.8

-

-

V

High Output Voltage, SO, INT

VOL

Current Sink = 1.6mA

-

-

0.4

V

Low Output Voltage, SO

VOH

Current Source = -0.8mA

VDD-0.8

-

-

V

Input Pull-Down Current, INx

IINPD

75

-

250

A

Reset Input Pull-Up Current, RST

IRPU

20

-

120

A