| Electronic Components Datasheet Search |
|
HCS12COREUG Datasheet(PDF) 40 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
HCS12COREUG Datasheet(HTML) 40 Page - NXP Semiconductors |
|
40 / 98 page ![]() MC9S12KG128 SoC Guide — V01.01 Section 3 System Clock Description The Clock and Reset Generator provides the internal clock signals for the core and all peripheral modules. Figure 3-1 shows the clock connections from the CRG to all modules. Consult the CRG Block Guide for details on clock generation. Figure 3-1 Clock Connections CRG bus clock core clock EXTAL XTAL oscillator clock S12_CORE IIC RAM SCI0, SCI1 PWM ATD EEPROM Flash TIM PIM SPI0, SPI1, SPI2 CAN0, CAN4 BDM 1/2 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |