ZSPM4013 Datasheet

© 2016 Integrated Device Technology, Inc.

13

April 15, 2016

Figure 3.2

Monitor and Control Logic Functionality

TSD

Filter

VCC-UV

Filter

Internal

POR

Filter

Filter

EN

VOUT-UV

Filter

PG

ENABLE

REGULATOR

VOUT-OV

Filter

IOCD

OCD_Filter

TRI-STATE

VSW OUTPUT

3.1.

Internal Protection Details

3.1.1.

Internal Current Limit

The current through the high side FET is sensed on a cycle-by-cycle basis, and if the current limit is reached, it will

abbreviate the cycle. In addition, the device senses the FB pin to identify hard short conditions and will direct the

VSW output to skip 4 cycles if the current limit occurs when FB is low. This allows current built up in the inductor

during the minimum on time to decay sufficiently. The current limit is always active when the regulator is enabled.

Soft start ensures that current limit does not prevent regulator startup.

An additional feature of the over-current protection circuitry is that under extended over-current conditions, the

device will automatically disable. A simple toggle of the EN enable pin will return the device to normal operation.

3.1.2.

Thermal Shutdown

If the temperature of the die exceeds 170°C (typical), the VSW outputs will tri-state to protect the device from

damage. The PG and all other protection circuitry will stay active to inform the system of the failure mode. Once the

ZSPM4013 cools to 160°C (typical), the device will attempt to start up again, following the normal soft start

sequence. If the device reaches 170°C, the shutdown/restart sequence will repeat.

3.1.3.

Reference Soft-Start

The reference in this device is ramped at a rate of 4ms to prevent the output from overshoot during startup. This

ramp restarts whenever there is a rising edge sensed on the EN pin. This occurs in both the fixed and adjustable

versions. During the soft start ramp, current limit is still active and still protects the device if the output is shorted.

3.1.4.

Output Over-Voltage

If the output of the regulator exceeds 103% of the regulation voltage, the VSW outputs will tri-state to protect the

ZSPM4013 from damage. This check occurs at the start of each switching cycle. If it occurs during the middle of a

cycle, the switching for that cycle will complete and the VSW outputs will tri-state at the start of the next cycle.

3.1.5.

VCC Under-Voltage Lockout

The ZSPM4013 is held in the off state until VCC reaches 5.75V (typical). There is hysteresis on this input (see

section 1.4).