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604 Hardware Specifications

Preliminary/Subject to Change without Notice

1.8.1 Internal Package Conduction Resistance

For the exposed-die packaging technology, the intrinsic conduction thermal resistance paths are as follows:

•

The die junction-to-case thermal resistance

•

The die junction-to-lead thermal resistance

These parameters are shown in Table 13.

Figure 18 depicts the primary heat transfer path for a package with an attached heat sink mounted to a

printed-circuit board.

Figure 18. C4 Package with Heat Sink Mounted to a Printed-Circuit Board

Heat generated on the active side (ball) of the chip is conducted through the silicon, then through the heat

sink attach material (or thermal interface material), and finally to the heat sink where it is removed by

forced-air convection.

Since the silicon thermal resistance is quite small, for a first-order analysis, the temperature drop in the

silicon may be neglected. Thus, the heat sink attach material and the heat sink conduction/convective

thermal resistances are the dominant terms. The following section provides a thermal management example

for the 604 using one of the commercially available heat-sinks.

Table 13. Package Thermal Resistance

Thermal Metric

C4-CQFP

BGA

Junction-to-case thermal resistance

0.03

°C/W

0.03

°C/W

Junction-to-lead (ball) thermal resistance

18.0

°C/W

2.2

°C/W

External Resistance

External Resistance

Secondary Heat Transfer Path

Primary Heat Transfer Path

Internal Resistance

(Note the internal versus external package resistance)

Radiation

Convection

Radiation

Convection

Heat Sink

Silicon

C4

Printed-Circuit Board

Thermal Interface Material

Package Leads/Ball

Chip Junction

Underfill

Package Substrate

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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