2/7

MA7002

Major Power Technology Co., Ltd.

Rev.1.2

2

nd, Jun., 2020



BLOCK DIAGRAM

Offset

Cancellation

Logic

VDD

+

-

Hall

Plate

N-MOS

P-MOS

OUT

GND



ORDER / MARKING INFORMATION

Order Information

Top Marking (SOT23-3L)

Package Type

MA7002

Packing

A : Taping

X X

A: SOT23-3L

Blank: Bag

H

Week: 01~26(A~Z)

27~52(a~z)

Year : 7 = 2017

ID Code: Internal

E Y W X

Top Marking (SIP-3L / SIP-3B)

Package Type

MA7002

Packing

X X

Blank: Bag

P3: SIP-3L (TO-92S)

P3B: SIP-3B (TO-92S-B)

YYWWX

7002

Part number

ID code:internal

WW:01~52

Year:17=2017



ABSOLUTE MAXIMUM RATINGS (at TA=25°C)

Characteristics

Symbol

Rating

Unit

VDD Pin Voltage

VDD

- 0.3 to 7V

V

Output Pin Voltage

VOUT

- 0.3 to 7V

V

Output Current

IOUT

10

mA

Storage Temperature Range

TST

-65 to +150

°C

Junction Temperature

TJ

+150

°C

Operating Temperature Range

TOP

-40 to +125

°C

Thermal Resistance from Junction to Case (SIP3 / SOT23)

θJC

49 / 410

°C/W

Thermal Resistance from Junction to Ambient (SIP3 / SOT23)

θJA

227 / 543 °C/W

Power Dissipation[PD=( TJ-TA ) / θJA ] (SIP3 / SOT23)

PD

550 / 230

mW

Note : θJA is measured with the PCB copper area of approximately 0.5 in2(Multi-layer).