ADM1063

Rev. 0 | Page 7 of 36

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

ADM1063

TOP VIEW

(Not to Scale)

40

39

38

37

36

35

34

33

32

31

11

12

13

14

15

16

17

18

19

20

VX1

1

VX2

2

VX3

3

VX4

4

VX5

5

VP1

6

VP2

7

VP3

8

VP4

9

PDO1

30

PDO2

29

PDO3

28

PDO4

27

PDO5

26

PDO6

25

PDO7

24

PDO8

23

PDO9

22

PDO10

21

PIN 1

INDICATOR

Figure 3. LFCSP Pin Configuration

NC = NO CONNECT

48

47

46

45

44

43

42

41

40

39

38

37

13

14

15

16

17

18

19

20

21

22

23

24

NC

1

VX1

2

VX2

3

VX3

4

VX4

5

VX5

6

VP1

7

VP2

8

VP3

9

NC

36

PDO1

35

PDO2

34

PDO3

33

PDO4

32

PDO5

31

PDO6

30

PDO7

29

PDO8

28

PDO9

27

PDO10

26

NC

25

ADM1063

TOP VIEW

(Not to Scale)

PIN 1

INDICATOR

Figure 4. TQFP Pin Configuration

Table 2. Pin Function Descriptions

Pin No.

LFCSP

TQFP

Mnemonic

Description

15, 16,

19, 20

1, 12, 13,

18, 19, 22

to 25, 36,

37, 48

NC

No Connection.

1 to 5

2 to 6

VX1 to VX5

High Impedance Inputs to Supply Fault Detectors. Fault thresholds can be set from 0.573 V to 1.375 V.

Alternatively, these pins can be used as general-purpose digital inputs.

6 to 9

7 to 10

VP1 to VP4

Low Voltage Inputs to Supply Fault Detectors. Three input ranges can be set by altering the input

attenuation on a potential divider connected to these pins, the output of which connects to a supply fault

detector. These pins allow thresholds from 2.5 V to 6.0 V, 1.25 V to 3.00 V, and 0.573 V to 1.375 V.

10

11

VH

High Voltage Input to Supply Fault Detectors. Two input ranges can be set by altering the input

attenuation on a potential divider connected to this pin, the output of which connects to a supply fault

detector. This pin allows thresholds from 6.0 V to 14.4 V and 2.5 V to 6.0 V.

11

14

AGND

Ground Return for Input Attenuators.

12

15

REFGND

Ground Return for On-Chip Reference Circuits.

13

16

REFIN

Reference Input for ADC. Nominally, 2.048 V.

14

17

REFOUT

Reference Output, 2.048 V.

17

20

SCL

SMBus Clock Pin. Open-drain output requires external resistive pull-up.

18

21

SDA

SMBus Data I/O Pin. Open-drain output requires external resistive pull-up.

21 to 30

26 to 35

PDO10 to PDO1

Programmable Output Drivers.

31

38

PDOGND

Ground Return for Output Drivers.

32

39

VCCP

Central Charge-Pump Voltage of 5.25 V. A reservoir capacitor must be connected between this pin and GND.

33

40

A0

Logic Input. This pin sets the seventh bit of the SMBus interface address.

34

41

A1

Logic Input. This pin sets the sixth bit of the SMBus interface address.

35

42

D2N

External Temperature Sensor 1 Cathode Connection.

36

43

D2P

External Temperature Sensor 1 Anode Connection.

37

44

D1N

External Temperature Sensor 1 Cathode Connection.

38

45

D1P

External Temperature Sensor 1 Anode Connection.

39

46

VDDCAP

Device Supply Voltage. Linearly regulated from the highest voltage on the VP1 to VP4 and VH pins to a

typical voltage of 4.75 V.

40

47

GND

Ground Supply.