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ICS487-25 Datasheet(PDF) 5 Page - Renesas Technology Corp |
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ICS487-25 Datasheet(HTML) 5 Page - Renesas Technology Corp |
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5 / 8 page ![]() ICS487-25 QUAD PLL FOR DTV CLOCK SYNTHESIZER IDT™ / ICS™ QUAD PLL FOR DTV 5 ICS487-25 REV B 092109 AC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V ±5%, Ambient Temperature 0 to +70 ° C Note 1: Measured with a 15 pF load. Thermal Characteristics Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency fIN 27 MHz Output Rise Time tOR 20% to 80%, Note 1 1.2 ns Output Fall Time tOF 80% to 20%, Note 1 1.0 ns Output Clock Duty Cycle at VDD/2, Note 1 45 50 55 % Absolute Clock Period Jitter Note 1 ±175 ps Frequency Synthesis Error All outputs 0 ppm Output Enable Time tOE PDTS high to output locked to ±1% 250 µs Output Disable Time tOD PDTS low to tri-state 20 ns Audio Clock Stabilization Time Time from a change in S1 or S0 until output stable within ±1% 50 µs Parameter Symbol Conditions Min. Typ. Max. Units Thermal Resistance Junction to Ambient θJA Still air 78 ° C/W θJA 1 m/s air flow 70 ° C/W θJA 3 m/s air flow 68 ° C/W Thermal Resistance Junction to Case θJC 37 ° C/W |
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