ICS527-01

CLOCK SLICER USER CONFIGURABLE ZERO DELAY BUFFER

ZDB AND MULTIPLIER/DIVIDER

IDT™ / ICS™ CLOCK SLICER USER CONFIGURABLE ZERO DELAY BUFFER 4

ICS527-01

REV G 051310

because of internal pull-ups) during Printed Circuit

Board layout, so the ICS527-01 automatically produces

the correct clock when all components are soldered. It

is also possible to connect the inputs to parallel I/O

ports in order to switch frequencies.

The output of the ICS527-01 can be determined by the

following simple equation:

Where:

Reference Divider Word (RDW) = 0 to 127

Feedback Divider Word (FDW) = 0 to 127

FB Frequency is the same as either CLK1 or

CLK2 depending on feedback connection

Also, the following operating ranges should be

observed:

S1 and S0 should be set for the frequency of CLK1,

according to the Frequency Range Table on page 2.

The device can be operated below the lower limits

stated in table 2, however, jitter and skew may be

higher. Therefore, if your expected output frequency

covers more than one frequency range, use the

setting for the highest frequency expected.

The dividers are expressed as integers. For example, if

a 50 MHz output on CLK1 is desired from a 40 MHz

input, the reference divider word (RDW) should be 2

and the feedback divider word (FDW) should be 3 which

gives the required 5/4 multiplication. Then R6:R0 is

0000010, F6:F0 is 0000011 and S1:S0 is 00. Also, this

example assumes CLK1 is connected to FBIN.S1:S0 is

set by referring to the Frequency Range Table. The

setting for 50 MHz is 00.

For assistance with configuring the device, please send

a description of your requirements using the “Technical

Support” link at www.idt.com.

FB Frequency

Input Frequency

FDW

2

+

RDW

2

+

------------------------

×

=

300kHz

Input Frequency

RDW

2

+

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