AM79C901A datasheet(21/90 Pages) AMD

21 / 90 page

Am79C901A

PR ELI M IN AR Y

TMS

Test Mode Select

Input

A serial input bit stream on the TMS pin is used to de-

fine the specific boundary scan test to be executed.

The pin has an internal pull-up resistor.

Ethernet Network Interfaces

TX±

Serial Transmit Data

Output

These pins carry the transmit output data and are con-

nected to the transmit side of the magnetics module.

RX±

Serial Receive Data

Input

These pins accept the receive input data from the

magnetics module.

IREF

Internal Current Reference

Input

This pin serves as a current reference for the integrated

1/10 PHY. It must be connected to GND through a

12.1 k

Ω resistor (1%).

HomePNA PHY Network Interface

HRTXRXP/HRTXRXN

Serial Receive Data

Input/Output

These pins accept the receive input data from the mag-

netics module and carry the transmit output data. A

102-

Ω resistor should be placed between these pins.

Clock Interface

XCLK/XTAL

External Clock/Crystal Select

Input

When HIGH, an external 60-MHz clock source is se-

lected bypassing the crystal circuit and clock trippler.

When LOW, a 20-MHz crystal is used instead. Table 1

illustrates how this pin works.

Table 1.

Clock Source Selection

XTAL1

Crystal Oscillator In

Input

The internal clock generator utilizes either a 20-MHz

crystal that is attached to pins XTAL1 and XTAL2 or a

60-MHz clock source connected to XTAL1. This pin is

not 5 V tolerant, and the 60 MHz clock source should

be from a 3.3 V source.

XTAL2

Crystal Oscillator Out

Output

The internal clock generator utilizes a 20-MHz crystal

that is attached to pins XTAL1 and XTAL2. In XCLK

mode, this pin should be left unconnected.

Power Supply

DVDD

Digital Power (5 Pins)

+3.3 V Power

These pins are the power supply pins that are used to

provide power to the digital portions of the design. All

DVDD pins must be connected to a +3.3 V supply.

AVDD

Analog Power (7 Pins)

+3.3 V Power

These pins are the power supply pins that are used to

provide power to the analog portions of the design. All

AVDD pins must be connected to a +3.3 V supply.

DVSS

Digital Ground (6 Pins)

Ground

These pins are the ground connections for the digital

portions of the design.

AVSS

Analog Ground (4 Pins)

Ground

These pins are the ground connections for the analog

portion of the design.

Scan Test Interface

TEN

Test Enable

Input

The test enable pin is for factory use only. It must be

connected to VSS for normal operation.

Input Pin

Output

XCLK/XTAL

Clock Source

XTAL1

XTAL2

20-MHz Crystal

XTAL1

60-MHz Oscillator/

External CLK

Source

AM79C901A Datasheet(PDF) 21 Page - Advanced Micro Devices

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