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AM79C901AVIT Datasheet(PDF) 81 Page - Advanced Micro Devices

Part # AM79C901AVIT
Description  HomePHY Single-Chip 1/10 Mbps Home Networking PHY
PDF  90 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C901AVIT Datasheet(HTML) 81 Page - Advanced Micro Devices

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Am79C901A
81
PR ELI M IN AR Y
AC CHARACTERISTICS (CONTINUED)
1 Mbps HomePNA Clock Timing (MII)
Note: During AID interval, RX_CLK and TX_CLK stop for up to 140
µs.
Figure 15.
1 Mbps HomePNA Clock Timing (MII)
No.
Symbol
Parameter Description
Clock Period
Unit
Idle (excluding IPG time)
74
tPER
TX_CLK, RX_CLK period
2333.34
ns
75
tPWH
TX_CLK, RX_CLK pulse width HIGH
1165
ns
76
tPWL
TX_CLK, RX_CLK pulse width LOW
1168
ns
Preamble (first 64 bits of TX MAC frame)
74
tPER
TX_CLK, RX_CLK period
933.33
ns
75
tPWH
TX_CLK, RX_CLK pulse width HIGH
466
ns
76
tPWL
TX_CLK, RX_CLK pulse width LOW
467
ns
Data (throughout the data phase)
74
tPER
TX_CLK, RX_CLK period
933 ns - 40
µs
75
tPWH
TX_CLK, RX_CLK pulse width HIGH
466 ns - 40
µs
76
tPWL
TX_CLK, RX_CLK pulse width LOW
467 ns - 40
µs
IPG (96 bit times following CRS falling edge)
74
tPER
TX_CLK, RX_CLK period
933.33
ns
75
tPWH
TX_CLK, RX_CLK pulse width HIGH
466
ns
76
tPWL
TX_CLK, RX_CLK pulse width LOW
467
ns
TX_CLK,
RX_CLK
74
76
75
22304B-39



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