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ICS1893AF Datasheet(PDF) 123 Page - Renesas Technology Corp

Part # ICS1893AF
Description  3.3-V 10Base-T/100Base-TX Integrated PHYceiver
PDF  137 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ICS1893AF Datasheet(HTML) 123 Page - Renesas Technology Corp

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Chapter 10
DC and AC Operating Conditions
ICS1893AF, Rev. D 10/26/04
October, 2004
123
ICS1893AF Data Sheet - Release
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
10.5.10
100M / MII Media Independent Interface: Transmit Latency
Table 10-17 lists the significant time periods for the MII / 100 Stream Interface transmit latency. The time
periods consist of timings of signals on the following pins:
• TXEN
• TXCLK
• TXD (that is, TXD[3:0])
• TP_TX (that is, TP_TXP and TP_TXN)
Figure 10-11 shows the timing diagram for the time periods.
† The IEEE maximum is 18 bit times.
Figure 10-11.
MII / 100M Stream Interface Transmit Latency Timing Diagram
Table 10-17.
MII / 100M Stream Interface Transmit Latency
Time
Period
Parameter
Conditions
Min.
Typ.
Max.
Units
t1
TXEN Sampled to MDI Output of First
Bit of /J/ †
MII mode
–
2.8
3
Bit times
TXEN
TXCLK
TXD
TP_TX†
† Shown
unscrambled.
t1
Preamble /K/
Preamble /J/



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