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- 2-

8/8/2006

BL8501

The following description refer to the functional block diagram:

Error Amplifier

The error amplifier is a high-gain differential amplifier used to regulate the converter output

voltage. The amplifier generates an error signal, which is fed to the PWM comparator. The

error signal is generated when a sample of the output voltage is compared to the internal

reference and the difference is amplified. The output sample is obtained from

FB

V

, which is

obtained from an external resistive divider connected between output voltage and GND.

PWM Comparator

The PWM comparator generates a series of pulses, which is obtained when the error signal is

compared to the oscillator clock. And the series of pulses are used to control the state of the

power switch by turning the driver on or off.

PWM/VFM controller

With a PWM/VFM alternative circuit, when the load current is small, the operation is

automatically switching into the VFM oscillator from PWM oscillator. Therefore, the efficiency

at small load current is improved.

Oscillator

The oscillator circuit provides a 500kHz clock, to set the converter operating frequency, and a

timing ramp of slope compensation. The clock waveform is a pulse, a few hundred

nanoseconds in duration.

Protection circuit

If the term of maximum duty cycle keeps on a certain time, the embedded protection circuit

works. The protection circuit is Reset-type protection circuit, and it works to restart the

operation with soft-start and repeat this operation until maximum duty cycle condition is

released. When the cause of large load current or something else is removed, the operation

is automatically released and returns to normal operation.

Soft-Start

The Soft-Start circuit causes the output voltage to increase to the regulation point at a

controlled rate of rise. The voltage on the charging soft-start capacitor gradually raises the

reference voltage of the error amplifier to clamp the error signal.

UVLO

UVLO function works when the input voltage is equal or less than UVLO threshold, it makes

this IC be standby and suppresses the consumption current and avoids an unstable

operation.

Enable (CE)

Logic low on CE puts the BL8501 in standby state. In standby mode, the output power switch,

voltage reference, and other functions are shut off, the supply current is reduced to 1

A

maximum.