CD4053B datasheet(11/48 Pages) TI

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6.7 Electrical Characteristics – CDIP, PDIP, SOIC and SOP Packages

Over operating free-air temperature range, VSUPPLY = ±5 V, and RL = 100 Ω, (unless otherwise noted)(1)

PARAMETER

TEST CONDITIONS

MIN TYP MAX

UNIT

VIS (V)

VEE (V)

VSS (V)

VDD (V)

TEMP

Signal Inputs (VIS) and Outputs (VOS) – CDIP, PDIP, SOIC and SOP Packages

Quiescent Device Current, IDD Max

0 V

5 V

–55°C

µA

–40°C

25°C

0.04

85°C

150

125°C

150

0 V

10 V

–55°C

–40°C

25°C

0.04

85°C

300

125°C

300

0 V

15 V

–55°C

–40°C

25°C

0.04

85°C

600

125°C

600

0 V

20 V

–55°C

100

–40°C

100

25°C

100

85°C

3000

125°C

3000

Drain to Source ON Resistance rON Max

0 ≤ VIS ≤ VDD

0 V

5 V

–55°C

800

–40°C

850

25°C

470 1050

85°C

1200

125°C

1300

0 V

10 V

–55°C

310

–40°C

300

25°C

180

400

85°C

520

125°C

550

0 V

15 V

–55°C

200

–40°C

210

25°C

125

240

85°C

300

125°C

300

Change in ON Resistance

(Between Any Two Channels),

ΔRON

0 V

5 V

25°C

0 V

10 V

0 V

15 V

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CD4051B, CD4052B, CD4053B

SCHS047K – AUGUST 1998 – REVISED MARCH 2023

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