CS5422

http://onsemi.com

6

PACKAGE PIN DESCRIPTION

PACKAGE PIN #

PIN SYMBOL

FUNCTION

SO−16

SO−24L

1

1

GATE(H)1

High Side Switch FET driver pin for channel 1.

2

2

GATE(L)1

Low Side Synchronous FET driver pin for channel 1.

3

−

GND

Ground pin for all circuitry contained in the IC. This pin is internally

bonded to the substrate of the IC.

−

3

PGND

Ground pin for the FET drivers.

4

4

BST

Power input for GATE(H)1 and GATE(H)2 pins.

−

5−8, 17−20

LGND

Ground pin for the internal control circuitry. The pin is internally

bonded to the substrate of the IC.

5

9

IS+1

Positive input for channel 1 overcurrent comparator.

6

10

IS−1

Negative input for channel 1 overcurrent comparator.

7

11

Error amplifier inverting input for channel 1.

8

12

COMP1

Channel 1 Error Amp output. PWM Comparator reference input. A

capacitor to LGND provides Error Amp compensation. The same

capacitor provides Soft Start timing for channel 1. This pin also

disables the channel 1 output when pulled below 0.3 V.

9

13

COMP2

Channel 2 Error Amp output. PWM Comparator reference input. A

capacitor to LGND provides Error Amp compensation and Soft

Start timing for channel 2. Channel 2 output is disabled when this

pin is pulled below 0.3 V.

10

14

Error amplifier inverting input for channel 2.

11

15

IS−2

Negative input for channel 2 overcurrent comparator.

12

16

IS+2

Positive input for channel 2 overcurrent comparator.

13

21

Oscillator frequency pin. A resistor from this pin to ground sets the

oscillator frequency.

14

22

Input Power supply pin.

15

23

GATE(L)2

Low Side Synchronous FET driver pin for channel 2.

16

24

GATE(H)2

High Side Switch FET driver pin for channel 2.