Nexperia

74LVC244A; 74LVCH244A

Octal buffer/line driver; 3-state

10.1. Waveforms and test circuit

mna171

nAn input

nYn output

tPLH

tPHL

GND

VI

VM

VM

VM

VM

VOH

VOL

Measurement points are given in Table 8.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig. 7. The input (nAn) to output (nYn) propagation delays

mna362

tPLZ

tPHZ

outputs

disabled

outputs

enabled

VY

VX

outputs

enabled

output

LOW-to-OFF

OFF-to-LOW

output

HIGH-to-OFF

OFF-to-HIGH

nOE input

VI

VOL

VOH

VCC

VM

GND

GND

tPZL

tPZH

VM

VM

Measurement points are given in Table 8.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig. 8. 3-state enable and disable times

Table 8. Measurement points

Supply voltage

Input

Output

VCC

VI

VM

VM

VX

VY

1.2 V

VCC

0.5 × VCC

0.5 × VCC

VOL + 0.15 V

VOH - 0.15 V

1.65 V to 1.95 V

VCC

0.5 × VCC

0.5 × VCC

VOL + 0.15 V

VOH - 0.15 V

2.3 V to 2.7 V

VCC

0.5 × VCC

0.5 × VCC

VOL + 0.15 V

VOH - 0.15 V

2.7 V

2.7 V

1.5 V

1.5 V

VOL + 0.3 V

VOH - 0.3 V

3.0 V to 3.6 V

2.7 V

1.5 V

1.5 V

VOL + 0.3 V

VOH - 0.3 V

74LVC_LVCH244A

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© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 12 — 16 September 2021

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