MC68340 datasheet(233/441 Pages) FREESCALE

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5- 96

MC68340 USER’S MANUAL

MOTOROLA

CLOCK

BUS

CONTROLLER

INSTRUCTION

CONTROLLER

EXECUTION

TIME

1 PRE-

FETCH

CMP

D1,D0

MOVEQ

#7,D1

BLE.B NOT TAKEN

OFFSET

CALC

WRITE

FOR 4

3 PRE-

FETCH

4 PRE-

FETCH

NOT

TAKEN

WRITE

FOR 4

MOVE TO

(A0)

MOVE.L D1,(AO)

CMP

2 PRE-

FETCH

Figure 5-35. Example 2—Branch Not Taken

5.7.2.3 TIMING EXAMPLE 3—NEGATIVE TAILS. This example (see Figure 5-36) shows

how to use negative tail figures for branches and other change-of-flow instructions. In this

example, bus speed is assumed to be four clocks per access. Instruction three is at the

branch destination.

Although the CPU32 has a two-word instruction pipeline, internal delay causes minimum

branch instruction time to be three bus cycles. The negative tail is a reminder that an extra

two clocks are available for prefetching a third word on a fast bus; on a slower bus, there

is no extra time for the third word.

Instructions

MOVEQ

#7, D1

BRA.W

FARAWAY

MOVE.L

D1, D0

CLOCK

BUS

CONTROLLER

INSTRUCTION

CONTROLLER

EXECUTION

TIME

MOVEQ

OFFSET

CALC

BRANCH OFFSET

BRA.W FARAWAY

TAKEN

FETCH MOVE.L

FETCH NEXT

INSTRUCTION

PREFETCH

MOVE

TO D0

MOVE.L D1,D0

MOVEQ #7,D1

Figure 5-36. Example 3—Branch Negative Tail

Freescale Semiconductor, Inc.

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