MC68340 datasheet(289/441 Pages) FREESCALE

289 / 441 page

MOTOROLA

MC68340 USER’S MANUAL

6- 39

DMAINT1

EQU $4

interrupt register channel 1

DMACCR1

EQU $8

control register channel 1

DMACSR1

EQU $A

status register channel 1

DMAFCR1

EQU $B

function code register channel 1

DMASAR1

EQU $C

source address register channel 1

DMADAR1

EQU $10

destination address register channel 1

DMABTC1

EQU $14

byte transfer count register channel 1

SARADD

EQU $10000

source address

NUMBYTE

EQU $C

number of bytes to transfer

***************************************************************************

* Initialize DMA Channel 1

***************************************************************************

LEA

MODBASE+DMACH1,A0 Pointer to channel 1

* Initialize DMA channel 1 MCR

* Normal Operation, ignore FREEZE, single-address mode. ISM field at 2. Make

* sure CPU32 SR I2-I0 bits are less than or equal to ISM bits for channel startup.

* Supervisor/user reg. unrestricted, MAID field at 7. IARB priority at 1.

MOVE.W

#$1271,(A0)

* Clear channel control reg.

* Clear STR (start) bit to prevent the channel from starting a transfer early.

CLR.W

DMACCR1(A0)

* Initialize interrupt reg.

* Interrupt priority at 7, interrupt vector at $42.

MOVE.W

#$0742,DMAINT1(A0)

* Initialize channel status reg.

* Clear the DONE, BES, BED, CONF and BRKP bits to allow channel to startup.

MOVE.B

#$7C,DMACSR1(A0)

* Initialize function code reg.

* DMA space, user data space for source.

MOVE.B

#$99,DMAFCR1(A0)

* Initialize source operand address

* Source address is equal to $10000.

MOVE.L

SARADD,DMASAR1(A0)

* Initialize the byte transfer count reg.

* The number of bytes to be transferred is $C or 3 long words

MOVE.L

NUMBYTE,DMABTC1(A0)

* Channel control reg. init. and Start DMA transfers

Freescale Semiconductor, Inc.

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