Nexperia

74LVC04A

Hex inverter

10.1. Waveforms and test circuit

mna344

tPHL

tPLH

VM

VM

VM

VM

nA input

nY output

GND

VI

VOH

VOL

VM = 1.5 V at VCC ≥ 2.7 V

VM = 0.5 × VCC at VCC < 2.7 V

VOL and VOH are typical output voltage levels that occur with the output load.

Fig. 6. The input (nA) to output (nY) propagation delays

VM

VM

tW

tW

10 %

90 %

0 V

VI

VI

negative

pulse

positive

pulse

0 V

VM

VM

90 %

10 %

tf

tr

tr

tf

001aaf615

VCC

VI

VO

DUT

CL

RT

RL

PULSE

GENERATOR

Test data is given in Table 8.

Definitions for test circuit:

RL = Load resistance

CL = Load capacitance including jig and probe capacitance

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

Fig. 7. Test circuit for measuring switching times

Table 8. Test data

Input

Load

Supply voltage

VI

tr, tf

CL

RL

1.2 V

VCC

≤ 2 ns

30 pF

1 kΩ

1.65 V to 1.95 V

VCC

≤ 2 ns

30 pF

1 kΩ

2.3 V to 2.7 V

VCC

≤ 2 ns

30 pF

500 Ω

2.7 V

2.7 V

≤ 2.5 ns

50 pF

500 Ω

3.0 V to 3.6 V

2.7 V

≤ 2.5 ns

50 pF

500 Ω

74LVC04A

All information provided in this document is subject to legal disclaimers.

© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 11 — 17 September 2021

6 / 12