Nexperia

74LVC74A

Dual D-type flip-flop with set and reset; positive-edge trigger

6. Functional description

Table 3. Function table

H = HIGH voltage level; L = LOW voltage level; X = don’t care

Input

Output

nSD

nRD

nCP

nD

nQ

nQ

L

H

X

X

H

L

H

L

X

X

L

H

L

L

X

X

H

H

Table 4. Function table

H = HIGH voltage level; L = LOW voltage level;

↑ = LOW-to-HIGH transition; Qn+1 = state after the next LOW-to-HIGH CP transition

Input

Output

nSD

nRD

nCP

nD

nQn+1

nQ n+1

H

H

↑

L

L

H

H

H

↑

H

H

L

7. Limiting values

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter

Conditions

Min

Max

Unit

VCC

supply voltage

-0.5

+6.5

V

IIK

input clamping current

VI < 0 V

-50

-

mA

VI

input voltage

[1]

-0.5

+6.5

V

IOK

output clamping current

VO > VCC or VO < 0 V

-

±50

mA

VO

output voltage

[2]

-0.5

VCC + 0.5 V

IO

output current

VO = 0 V to VCC

-

±50

mA

ICC

supply current

-

100

mA

IGND

ground current

-100

-

mA

Tstg

storage temperature

-65

+150

°C

Ptot

total power dissipation

Tamb = -40 °C to +125 °C

[3]

-

500

mW

[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.

[2] The output voltage ratings may be exceeded if the output current ratings are observed.

[3] For SOT108-1 (SO14) package: Ptot derates linearly with 10.1 mW/K above 100 °C.

For SOT402-1 (TSSOP14) package: Ptot derates linearly with 7.3 mW/K above 81 °C.

For SOT762-1 (DHVQFN14) package: Ptot derates linearly with 9.6 mW/K above 98 °C.

74LVC74A

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© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 9 — 20 August 2021

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