BSN205 datasheet(2/8 Pages) PHILIPS

2 / 8 page

April 1995

Philips Semiconductors

Product speciﬁcation

N-channel enhancement mode vertical

D-MOS transistor

BSN205; BSN205A

DESCRIPTION

N-channel enhancement mode

vertical D-MOS transistor in a TO-92

variant envelope. Designed primarily

as a line current interrupter in

telephone sets, it can also be applied

in other applications such as in relays,

line and high speed transformer

drivers etc.

FEATURES

• Direct interface to C-MOS, TTL,

etc.

• High-speed switching

• No secondary breakdown

• Low R

DS(on)

QUICK REFERENCE DATA

PINNING - TO-92 VARIANT

Drain-source voltage

VDS

max.

200 V

Gate-source voltage (open drain)

± VGSO

max.

20 V

Drain current (DC)

max.

300 mA

Total power dissipation up to

Tamb =25 °CPtot

max.

1 W

Drain-source ON-resistance

typ.

max.

4.5

Ω

ID = 400 mA; VGS =10V

RDS(on)

Transfer admittance

min.

typ.

200

350

ID = 400 mA; VDS =25V

 Yfs 

BSN205

BSN205A

= gate

= source

= drain

= gate

= source

= drain

PIN CONFIGURATION

Fig.1 Simplified outline and symbol.

Note: various pinout configurations available.

handbook, halfpage

MAM148

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