AD9211 datasheet(5/21 Pages) AD

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Preliminary Technical Data

AD9211

Rev. PrA | Page 5 of 21

DIGITAL SPECIFICATIONS

Table 3 (AVDD = 1.8 V, DRVDD = 1.8 V, TMIN = –40°C, TMAX = +85°C, DCS Enabled unless otherwise noted.)

AD9211-170/-200

AD9211-250

Parameter

Temp

Min

Typ

Max

Min

Typ

Max

Unit

CLOCK INPUTS

Differential Input Voltage1

Full

tbd

Common-Mode Voltage2

Full

tbd

Input Resistance

Full

tbd

kΩ

Input Capacitance

25°C

LOGIC INPUTS

Logic 1 Voltage

Full

.8 x VDD

2.0

Logic 0 Voltage

Full

.2 x AVDD

0.8

Logic 1 Input Current

Full

μA

Logic 0 Input Current

Full

μA

Input Capacitance

25°C

LOGIC OUTPUTS3

VOD Differential Output Voltage

Full

247

454

247

454

VOS Output Offset Voltage

Full

1.125

1.375

1.125

1.375

Output Coding

Twos Complement, or Binary

1 All ac specifications tested by driving CLK+ and CLK– differentially, |(CLK+)– (CLK–)| > 200 mV.

2 Clock inputs’ common mode can be externally set, such that xx.xV < (Clk+ or Clk- ) < zzz V.

3 LVDS RTermination = 100

Ω

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