PEMD48

50 V, 100 mA NPN/PNP resistor-equipped double transistor;

R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2 = 47 kΩ

29 December 2022

Product data sheet

1. General description

NPN/PNP double Resistor-Equipped Transistor (RET) in an ultra small and flat lead SOT666

Surface-Mounted Device (SMD) plastic package.

2. Features and benefits

• 100 mA output current capability

• Built-in bias resistors

• Simplifies circuit design

• Reduces component count

• Reduces pick and place costs

3. Applications

• Low current peripheral driver

• Controlling IC inputs

• Replacement for general purpose transistors in digital applications

4. Quick reference data

Table 1. Quick reference data

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Per transistor; for the PNP transistor with negative polarity

VCEO

collector-emitter

voltage

open base

-

-

50

V

IO

output current

-

-

100

mA

Transistor TR1 (NPN)

R1

bias resistor 1 (input)

[1]

33

47

61

kΩ

R2/R1

bias resistor ratio

[1]

0.8

1

1.2

Transistor TR2 (PNP)

R1

bias resistor 1 (input)

[1]

1.54

2.2

2.86

kΩ

R2/R1

bias resistor ratio

[1]

17

21

26

[1] See section "Test information" for resistor calculation and test conditions.