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IR3084MPBF Datasheet(PDF) 7 Page - International Rectifier

Part # IR3084MPBF
Description  XPHASETM VR 10/11 CONTROL IC
PDF  45 Pages
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Manufacturer  IRF [International Rectifier]
Direct Link  http://www.irf.com
Logo IRF - International Rectifier

IR3084MPBF Datasheet(HTML) 7 Page - International Rectifier

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IR3084
Page 7 of 45
07/20/2005
SYSTEM THEORY OF OPERATION
XPhase
TM Architecture
The XPhase
TM
architecture is designed for multiphase interleaved buck converters which are used in
applications requiring small size, design flexibility, low voltage, high current and fast transient response. The
architecture can be used in any multiphase converter ranging from 1 to 16 or more phases where flexibility
facilitates the design trade−off of multiphase converters. The scalable architecture can be applied to other
applications which require high current or multiple output voltages.
As shown in Figure 2, the XPhase
TM architecture consists of a Control IC and a scalable array of phase
converters each using a single Phase IC. The Control IC communicates with the Phase ICs through a 5−wire
analog bus, i.e. bias voltage, phase timing, average current, error amplifier output, and VID voltage. The Control
IC incorporates all the system functions, i.e. VID, PWM ramp oscillator, error amplifier, bias voltage, and fault
protections etc. The Phase IC implements the functions required by the converter of each phase, i.e. the gate
drivers, PWM comparator and latch, over−voltage protection, and current sensing and sharing.
There is no unused or redundant silicon with the XPhase
TM architecture compared to others such as a 4 phase
controller that can be configured for 2, 3, or 4 phase operation. PCB Layout is easier since the 5 wire bus
eliminates the need for point−to−point wiring between the Control IC and each Phase. The critical gate drive and
current sense connections are short and local to the Phase ICs. This improves the PCB layout by lowering the
parasitic inductance of the gate drive circuits and reducing the noise of the current sense signal.
VR FAN
VID3
ADDITIONAL PHASES
INPUT/OUTPUT
CONTROL BUS
COUT
>> VID VOLTAGE
VID0
VID1
VID2
VOUT SENSE+
VR HOT
VR READY
IR3084
CONTROL
IC
>> PWM CONTROL
>> PHASE TIMING
>> BIAS VOLTAGE
<< CURRENT SENSE
RCS
CCS
CIN
RCS
CCS
VID6
VID5
VIDSEL
VID7
VID4
VOUT-
VOUT SENSE-
12V
VOUT+
ENABLE
IR3086
PHASE
IC
PHASE FAULT
IR3086
PHASE
IC
CURRENT SHARE
CURRENT SHARE
PHASE FAULT
PHASE FAULT
Figure 2 – System Block Diagram



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