Nexperia

74ABT32

Quad 2-input OR gate

9. Static characteristics

Table 6. Static characteristics

25 °C

-40 °C to +85 °C

Symbol Parameter

Conditions

Min

Typ Max

Min

Max

Unit

VIK

input clamping voltage VCC = 4.5 V; IIK = -18 mA

-1.2

-0.9

-

-1.2

-

V

VOH

HIGH-level output

voltage

VCC = 4.5 V; IOH = -15 mA;

VI = VIL or VIH

2.5

2.9

-

2.5

-

V

VOL

LOW-level output

voltage

VCC = 4.5 V; IOL = 20 mA;

VI = VIL or VIH

-

0.35

0.5

-

0.5

V

II

input leakage current

VCC = 5.5 V; VI = GND or 5.5 V

-

±0.01 ±1.0

-

±1.0

μA

IOFF

power-off leakage

current

VCC = 0 V; VI or VO ≤ 4.5 V

-

±5.0 ±100

-

±100 μA

ICEX

output high leakage

current

HIGH-state; VO = 5.5 V; VCC = 5.5 V;

VI = GND or VCC

-

5.0

50

-

50

μA

IO

output current

VCC = 5.5 V; VO = 2.5 V

[1] -50

-75

-180

-50

-180

mA

ICC

supply current

VCC = 5.5 V; VI = GND or VCC

-

2

50

-

50

μA

ΔICC

additional supply

current

per input pin; VCC = 5.5 V;

one input at 3.4 V;

other inputs at VCC or GND

[2]

-

0.25

500

-

500

μA

CI

input capacitance

VI = 0 V or VCC

-

3

-

-

-

pF

[1] Not more than one output should be tested at a time, and the duration of the test should not exceed one second.

[2] This is the increase in supply current for each input at 3.4 V.

10. Dynamic characteristics

Table 7. Dynamic characteristics

GND = 0 V; for test circuit, see Fig. 7.

25 °C; VCC = 5.0 V

-40 °C to +85 °C;

VCC = 5.0 V ± 0.5 V

Symbol Parameter

Conditions

Min

Typ

Max

Min

Max

Unit

tPLH

LOW to HIGH

propagation delay

nA, nB to nY; see Fig. 6

1.0

2.3

3.4

1.0

3.8

ns

tPHL

HIGH to LOW

propagation delay

nA, nB to nY; see Fig. 6

1.0

1.9

2.9

1.0

3.2

ns

tsk(o)

output skew time

[1]

-

0.4

0.5

-

0.5

ns

[1] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.

74ABT32

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© Nexperia B.V. 2020. All rights reserved

Product data sheet

Rev. 4 — 9 October 2020

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