©

1987

BIPOLAR ANALOG INTEGRATED CIRCUIT

µµµµPC4061

J-FET INPUT LOW-POWER OPERATIONAL AMPLIFIER

DATA SHEET

Document No. G15038EJ3V0DS00 (3rd edition)

(Previous No. IC-1990)

Date Published August 2000 NS CP(K)

Printed in Japan

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for

availability and additional information.

The mark 5 shows major revised points.

DESCRIPTION

The

µPC4061 is a J-FET input low-power operational amplifier featuring low supply voltage operation from ±2 V.

Supply current is ten times smaller than

µPC4081 type J-FET input op-amp. With very low input bias current

characteristics, the

µPC4061 is an excellent choice for hand-held measurement equipment and other low-power

application circuits.

FEATURES

• Low supply current: 220

µA (TYP.)

• Very low input bias and offset currents

• Offset voltage null capability

• High input impedance...J-FET Input Stage

• Low supply voltage operation

• Output short circuit protection

• Internal frequency compensation

ORDERING INFORMATION

Part Number

Package

µPC4061C

8-pin plastic DIP (7.62 mm (300))

µPC4061G2

8-pin plastic SOP (5.72 mm (225))

EQUIVALENT CIRCUIT

R1

R4

R9

Q5

Q9

Q14

Q15

Q16

Q11

Q12

Q10

R5

R7

R8

Q13

Q7

Q4

Q3

R2

R3

R6

Q19

Q20

Q17

Q18

OUT

II

IN

OFFSET

NULL

OFFSET

NULL

V

+

V

_

Q2

Q1

Q6

Q8

C1

(7)

(6)

(2)

(3)

(5)

(1)

(4)

PIN CONFIGURATION (Top View)

PC4061C, 4061G2

1

2

3

4

8

7

6

5

NC

V+

OUT

OFFSET

NULL

+

_

OFFSET

NULL

II

IN

V

µ

_

Remark NC : No Connection