Nexperia

74ALVC08

Quad 2-input AND gate

12. Abbreviations

Table 10. Abbreviations

Acronym

Description

CMOS

Complementary Metal-Oxide Semiconductor

DUT

Device Under Test

ESD

ElectroStatic Discharge

HBM

Human Body Model

MM

Machine Model

TTL

Transistor-Transistor Logic

13. Revision history

Table 11. Revision history

Document ID

Release date

Data sheet status

Change notice

Supersedes

74ALVC08 v.4

20210430

Product data sheet

-

74ALVC08 v.3

Modifications:

• Section 1 updated.

• Section 2: Reference to JESD36 removed.

• Section 7: Derating values for Ptot total power dissipation have been updated.

74ALVC08 v.3

20171005

Product data sheet

-

74ALVC08 v.2

Modifications:

• The format of this data sheet has been redesigned to comply with the identity guidelines of

Nexperia.

• Legal texts have been adapted to the new company name where appropriate.

74ALVC08 v.2

20030516

Product specification

-

74ALVC08 v.1

74ALVC08 v.1

20030204

Product specification

-

-

74ALVC08

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© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 4 — 30 April 2021

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